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binutils: Upgrade to 2.36 release

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Drop backported patches which are already present in 2.36 release

(From OE-Core rev: 897afa95ba340f1124decac5753e1d1e1283b515)

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
This commit is contained in:
Khem Raj
2021-01-29 23:19:50 -08:00
committed by Richard Purdie
parent 39c454a1df
commit b7daba6738
26 changed files with 737 additions and 1060 deletions
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55
meta/recipes-devtools/binutils/binutils/0010-Add-support-for-Netlogic-XLP.patch
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@@ -1,7 +1,7 @@
From 69ab45c16f80f18fa78121f6e774750b9e9a200b Mon Sep 17 00:00:00 2001
From c64a5ca02a55b748311032e2c7d9c4f87bd74c63 Mon Sep 17 00:00:00 2001
From: Khem Raj <raj.khem@gmail.com>
Date: Sun, 14 Feb 2016 17:06:19 +0000
Subject: [PATCH 10/17] Add support for Netlogic XLP
Subject: [PATCH] Add support for Netlogic XLP
Patch From: Nebu Philips <nphilips@netlogicmicro.com>
@@ -35,7 +35,7 @@ Signed-off-by: Mark Hatle <mark.hatle@windriver.com>
15 files changed, 65 insertions(+), 21 deletions(-)
diff --git a/bfd/aoutx.h b/bfd/aoutx.h
index d352a1a3e44..2e2c3c1af86 100644
index 8025b8c5241..cdcb7876896 100644
--- a/bfd/aoutx.h
+++ b/bfd/aoutx.h
@@ -810,6 +810,7 @@ NAME (aout, machine_type) (enum bfd_architecture arch,
@@ -47,7 +47,7 @@ index d352a1a3e44..2e2c3c1af86 100644
arch_flags = M_MIPS2;
break;
diff --git a/bfd/archures.c b/bfd/archures.c
index 551ec8732f0..2665b378623 100644
index 8c1d32ca930..b4b2927ebc0 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -185,6 +185,7 @@ DESCRIPTION
@@ -59,10 +59,10 @@ index 551ec8732f0..2665b378623 100644
.#define bfd_mach_mipsisa32r2 33
.#define bfd_mach_mipsisa32r3 34
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 35ef4d755bb..48db00af80b 100644
index 7eff85b7eaa..6c9eb12865e 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1585,6 +1585,7 @@ enum bfd_architecture
@@ -1590,6 +1590,7 @@ enum bfd_architecture
#define bfd_mach_mips_octeon3 6503
#define bfd_mach_mips_xlr 887682 /* decimal 'XLR'. */
#define bfd_mach_mips_interaptiv_mr2 736550 /* decimal 'IA2'. */
@@ -71,10 +71,10 @@ index 35ef4d755bb..48db00af80b 100644
#define bfd_mach_mipsisa32r2 33
#define bfd_mach_mipsisa32r3 34
diff --git a/bfd/config.bfd b/bfd/config.bfd
index e5233cd1f7e..2e4ae6bbdff 100644
index 2caf492e172..e75417da4d8 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -877,6 +877,11 @@ case "${targ}" in
@@ -879,6 +879,11 @@ case "${targ}" in
targ_defvec=mips_elf32_le_vec
targ_selvecs="mips_elf32_be_vec mips_elf64_be_vec mips_elf64_le_vec"
;;
@@ -87,7 +87,7 @@ index e5233cd1f7e..2e4ae6bbdff 100644
targ_defvec=mips_elf32_be_vec
targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec"
diff --git a/bfd/cpu-mips.c b/bfd/cpu-mips.c
index 802acb45f1e..fd9ec4c0ad4 100644
index 5a944ceee81..c57d12ba3dd 100644
--- a/bfd/cpu-mips.c
+++ b/bfd/cpu-mips.c
@@ -108,7 +108,8 @@ enum
@@ -111,10 +111,10 @@ index 802acb45f1e..fd9ec4c0ad4 100644
/* The default architecture is mips:3000, but with a machine number of
diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
index 160febec94c..4c9499cc2cf 100644
index 3cbb3cf9495..0c6cd47b40c 100644
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -6982,6 +6982,9 @@ _bfd_elf_mips_mach (flagword flags)
@@ -6980,6 +6980,9 @@ _bfd_elf_mips_mach (flagword flags)
case E_MIPS_MACH_IAMR2:
return bfd_mach_mips_interaptiv_mr2;
@@ -124,7 +124,7 @@ index 160febec94c..4c9499cc2cf 100644
default:
switch (flags & EF_MIPS_ARCH)
{
@@ -12356,6 +12359,10 @@ mips_set_isa_flags (bfd *abfd)
@@ -12335,6 +12338,10 @@ mips_set_isa_flags (bfd *abfd)
val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_OCTEON2;
break;
@@ -135,7 +135,7 @@ index 160febec94c..4c9499cc2cf 100644
case bfd_mach_mipsisa32:
val = E_MIPS_ARCH_32;
break;
@@ -14373,6 +14380,7 @@ static const struct mips_mach_extension mips_mach_extensions[] =
@@ -14352,6 +14359,7 @@ static const struct mips_mach_extension mips_mach_extensions[] =
{ bfd_mach_mips_gs264e, bfd_mach_mips_gs464e },
{ bfd_mach_mips_gs464e, bfd_mach_mips_gs464 },
{ bfd_mach_mips_gs464, bfd_mach_mipsisa64r2 },
@@ -144,10 +144,10 @@ index 160febec94c..4c9499cc2cf 100644
/* MIPS64 extensions. */
{ bfd_mach_mipsisa64r2, bfd_mach_mipsisa64 },
diff --git a/binutils/readelf.c b/binutils/readelf.c
index 6057515a89b..ea119b0b254 100644
index ad16b4571c9..4bf2b732502 100644
--- a/binutils/readelf.c
+++ b/binutils/readelf.c
@@ -3483,6 +3483,7 @@ get_machine_flags (Filedata * filedata, unsigned e_flags, unsigned e_machine)
@@ -3502,6 +3502,7 @@ get_machine_flags (Filedata * filedata, unsigned e_flags, unsigned e_machine)
case E_MIPS_MACH_OCTEON3: strcat (buf, ", octeon3"); break;
case E_MIPS_MACH_XLR: strcat (buf, ", xlr"); break;
case E_MIPS_MACH_IAMR2: strcat (buf, ", interaptiv-mr2"); break;
@@ -156,7 +156,7 @@ index 6057515a89b..ea119b0b254 100644
/* We simply ignore the field in this case to avoid confusion:
MIPS ELF does not specify EF_MIPS_MACH, it is a GNU
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 31acb77d78a..0ead168d51e 100644
index 538b69710f5..b021b64f14b 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -568,6 +568,7 @@ static int mips_32bitmode = 0;
@@ -175,7 +175,7 @@ index 31acb77d78a..0ead168d51e 100644
)
/* Whether the processor uses hardware interlocks to protect reads
@@ -20174,7 +20176,7 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
@@ -20156,7 +20158,7 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
/* Broadcom XLP.
XLP is mostly like XLR, with the prominent exception that it is
MIPS64R2 rather than MIPS64. */
@@ -185,10 +185,10 @@ index 31acb77d78a..0ead168d51e 100644
/* MIPS 64 Release 6. */
{ "i6400", 0, ASE_VIRT | ASE_MSA, ISA_MIPS64R6, CPU_MIPS64R6},
diff --git a/gas/configure b/gas/configure
index 5bccfd9d1b7..d4b13e6fc8b 100755
index d03432c6dc6..d5ae54925e9 100755
--- a/gas/configure
+++ b/gas/configure
@@ -12722,6 +12722,9 @@ _ACEOF
@@ -12761,6 +12761,9 @@ _ACEOF
mipsisa64r6 | mipsisa64r6el)
mips_cpu=mips64r6
;;
@@ -199,10 +199,10 @@ index 5bccfd9d1b7..d4b13e6fc8b 100755
mips_cpu=r3900
;;
diff --git a/gas/configure.ac b/gas/configure.ac
index b65108fecb2..ce1f2dad9bc 100644
index 82706561886..f1c27bf2878 100644
--- a/gas/configure.ac
+++ b/gas/configure.ac
@@ -325,6 +325,9 @@ changequote([,])dnl
@@ -332,6 +332,9 @@ changequote([,])dnl
mipsisa64r6 | mipsisa64r6el)
mips_cpu=mips64r6
;;
@@ -213,7 +213,7 @@ index b65108fecb2..ce1f2dad9bc 100644
mips_cpu=r3900
;;
diff --git a/include/elf/mips.h b/include/elf/mips.h
index cc08ebd4318..bb518575ce1 100644
index 4bd86307120..2d7df22abf2 100644
--- a/include/elf/mips.h
+++ b/include/elf/mips.h
@@ -290,6 +290,7 @@ END_RELOC_NUMBERS (R_MIPS_maxext)
@@ -225,7 +225,7 @@ index cc08ebd4318..bb518575ce1 100644
#define E_MIPS_MACH_OCTEON3 0x008e0000
#define E_MIPS_MACH_5400 0x00910000
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index fd031f37588..a96a44df840 100644
index d1b4a2574ac..879c68fcfd4 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -1260,6 +1260,8 @@ static const unsigned int mips_isa_table[] = {
@@ -256,7 +256,7 @@ index fd031f37588..a96a44df840 100644
return FALSE;
}
diff --git a/ld/configure.tgt b/ld/configure.tgt
index 9b4bf2ca964..f6d7171dff7 100644
index 47431770a17..f714744eab3 100644
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -510,6 +510,9 @@ mips*-sde-elf* | mips*-mti-elf* | mips*-img-elf*)
@@ -270,7 +270,7 @@ index 9b4bf2ca964..f6d7171dff7 100644
targ_extra_emuls="elf32lr5900"
targ_extra_libpath=$targ_extra_emuls
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index 755bbe294bd..ce22ef683a6 100644
index 317ced51204..6869f890656 100644
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -674,13 +674,11 @@ const struct mips_arch_choice mips_arch_choices[] =
@@ -293,7 +293,7 @@ index 755bbe294bd..ce22ef683a6 100644
/* This entry, mips16, is here only for ISA/processor selection; do
not print its name. */
diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
index 5270aeefa80..d17dc78cd71 100644
index b45eb40bf69..2f4eb5c0354 100644
--- a/opcodes/mips-opc.c
+++ b/opcodes/mips-opc.c
@@ -328,6 +328,7 @@ decode_mips_operand (const char *p)
@@ -404,6 +404,3 @@ index 5270aeefa80..d17dc78cd71 100644
{"swc0", "E,o(b)", 0xe0000000, 0xfc000000, RD_3|RD_C0|SM, 0, I1, 0, IOCT|IOCTP|IOCT2|I37 },
{"swc0", "E,A(b)", 0, (int) M_SWC0_AB, INSN_MACRO, 0, I1, 0, IOCT|IOCTP|IOCT2|I37 },
{"swc1", "T,o(b)", 0xe4000000, 0xfc000000, RD_1|RD_3|SM|FP_S, 0, I1, 0, 0 },
--
2.28.0