Can't be enabled by default as v4l-utils is in meta-oe.
(From OE-Core rev: c7a200553b720b9a58c5e6702a89b9ea49f70f74)
(From OE-Core rev: 1d290bd4373dea5fd035593249a1f31afe54b789)
Signed-off-by: Ross Burton <ross.burton@arm.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
There's very little reason to expose "build shared libraries", "build
position-independent code", or "enable threads" as recipe-specific
packageconfig options. Revert the commit which did this and explicitly
set the relevant options in EXTRA_OECONF.
This reverts commit b6e67e3d28.
(From OE-Core rev: ec62603a348154d837d5f0cbd52bb12468973341)
(From OE-Core rev: 521a084190f72fc7a8783571829bd697e2baa1f0)
Signed-off-by: Ross Burton <ross.burton@arm.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
ffmpeg 6.0 has added assembly routines which uses rv64i ISA
unconditionally, ideally it should check for ISA before using those
instructions.
Fixes errors like
<instantiation>:1:1: error: instruction requires the following: RV64I Base Instruction Set
ld t0, (a1)
^
src/libavcodec/riscv/pixblockdsp_rvi.S:24:1: note: while in macro instantiation
.irp row, 0, 1, 2, 3, 4, 5, 6, 7
^
<instantiation>:3:9: error: instruction requires the following: RV64I Base Instruction Set
sd zero, ((0 * 16) + 0)(a0)
^
(From OE-Core rev: 010b068bcc126dbbc1e2032997e8d83360a7de35)
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
