Commit Graph

18 Commits

Author SHA1 Message Date
Richard Purdie
bb6ddc3691 Convert to new override syntax
This is the result of automated script conversion:

scripts/contrib/convert-overrides.py <oe-core directory>

converting the metadata to use ":" as the override character instead of "_".

(From OE-Core rev: 42344347be29f0997cc2f7636d9603b1fe1875ae)

Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2021-08-02 15:44:10 +01:00
Khem Raj
47b15ea9db qemuriscv: Enable 4 core emulation
Helps in running tests a bit faster

(From OE-Core rev: 735799a66e52ced9de9431ad3062b13583e3754f)

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2021-06-12 22:54:14 +01:00
Alistair Francis
bd4748e22a conf/machine: Enable keyboard and mouse on RISC-V machines
(From OE-Core rev: d115ebea8983641b42202379119ce35d6ee4a3b0)

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2021-04-05 15:29:02 +01:00
Alistair Francis
cc5d71ef73 conf/machine: Enable bochs-display on RISC-V machines
Enable the bochs-display as q QEMU argument when running on RISC-V
machines.

(From OE-Core rev: ec085b75a1edb14c6e4dd1dc2f5cdf62f44d0e39)

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2021-04-05 15:29:02 +01:00
Khem Raj
51ef6bbbd9 qemuriscv: check serial consoles w.r.t. /proc/consoles
qemuriscv enables hvc0 along with ttyS0, however its not enabled in
/proc/consoles, getty tries to enable it in inittab and erroring out

Fixes below message with sysvinit

INIT: Id "hvc0" respawning too fast: disabled for 5 minutes

(From OE-Core rev: 8a6559f1561ca6b7719bb46fc446db46d8086ea3)

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2020-12-18 22:52:24 +00:00
Khem Raj
3c9268f6a0 arch-riscv: Enable qemu-usermode on rv32
Current version of Qemu in OE-core now works fine in rv32/user-mode the
said nvalid instruction errors are gone, so we can enable it now

(From OE-Core rev: f3fa54f91eef5b1b967a6a14b53a07de052dd17a)

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2020-11-17 21:53:14 +00:00
Martin Jansa
b5d4671d38 tune-riscv.inc: use nf suffix also for TUNE_PKGARCH
* broken since introduction:
  commit 5263b2ebc57fe289d64c74bfb10da39ed7c98828
  Author: Alistair Francis <alistair.francis@wdc.com>
  Date:   Thu Dec 19 13:24:10 2019 -0800

    tune-riscv: Add support for no float

* fixes:
  scripts/tune/log.fake-riscv.riscv32nf:    Error, the PACKAGE_ARCHS variable (all any noarch riscv32nf fake_riscv) for DEFAULTTUNE (riscv32nf) does not contain TUNE_PKGARCH (riscv32).
  scripts/tune/log.fake-riscv.riscv64nf:    Error, the PACKAGE_ARCHS variable (all any noarch riscv64nf fake_riscv) for DEFAULTTUNE (riscv64nf) does not contain TUNE_PKGARCH (riscv64).

(From OE-Core rev: 58088dce12775e325df8428b750e19616d264464)

Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2020-10-17 23:22:19 +01:00
Khem Raj
b6b985a223 qemuboot: Add QB_RNG variable
RNG passthru has been enabled on all qemu machines but its being added
to each one of them, with this patch its turned into QB variables which
defaults to host passthru, yet it can be overridden if needed via
machine or config metadata if needed.

(From OE-Core rev: 26dd24506ef36088e17f999ce5489dc4b72194e8)

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2020-09-24 22:32:49 +01:00
Alistair Francis
badc7c486d opensbi: Update to OpenSBI v0.8 release
(From OE-Core rev: f160800ec79973a5e8d8454fe3d695729a993f8b)

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2020-06-28 08:35:59 +01:00
Alistair Francis
cedd94f0c5 tune-riscv: Add support for no float
(From OE-Core rev: 5263b2ebc57fe289d64c74bfb10da39ed7c98828)

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2019-12-30 23:39:10 +00:00
Alistair Francis
5125464811 machine/arch-riscv: Fix newlib and baremetal builds
Fix the following errors for newlib and baremetal libcs:
ld: unrecognized option '--hash-style=sysv'
ld: unrecognized option '--hash-style=gnu'

(From OE-Core rev: 8ae998fa8dd216d008cc9ddbea98bbb945501e41)

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2019-11-29 17:43:39 +00:00
Khem Raj
91b787334a qemuriscv: Do not blacklist clang anymore
clang 9.x ( which is now default in meta-clang ) supports riscv

(From OE-Core rev: 198689f74915756ce6ae38d6735780a26e9b3f7e)

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2019-09-27 13:02:16 +01:00
Alistair Francis
b8c2575002 qemuriscv: Generate a wic rootFS with a larger filesystem
This allows us to generate a rootFS with a large filesystem for use with
QEMU.

(From OE-Core rev: e06439200e44999c1e2f88d7d6c651da13698ca7)

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2019-09-03 09:55:50 +01:00
Khem Raj
6e3fac8de6 tune-riscv: Drop littleendian and introduce bigendian tune
Default riscv is little-endian moreover most of other arches define
bigendian as tune and treats absense as litteendian, this make risc-v
fall in line

(From OE-Core rev: cd6f377591a7bd7b3c61ce580f997aaeffab3df3)

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2019-09-03 09:55:50 +01:00
Alexander Kanavin
b0bad37101 qemu: set default RAM to 256M for all machines
There was a discussion about what amount of RAM is appropriate for a
default; the outcome was that for now it is still 256M. Some qemu machine
definitions have however set this to 512M so for the sake of
treating all architectures fairly, they are reset back to 256M.

Also runqemu is adjusted to use 256M if QB_MEM is not set at all.

http://lists.openembedded.org/pipermail/openembedded-core/2019-August/285900.html

(From OE-Core rev: 04c01b6cc5be3e6d45d0e04571640648a5655a8b)

Signed-off-by: Alexander Kanavin <alex.kanavin@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2019-08-30 17:10:28 +01:00
Alistair Francis
dd6358438c qemuriscv64: Specify the firmware as a bios instead of kernel
Now that we have a -bios option for the RISC-V virt machine in QEMU we
can pass OpenSBI in via -bios and the kernel in via -kernel. We no
longer need to pass the kernel in via -device loader so let's remove
that.

(From OE-Core rev: 65e7f371f19e053d0bac7771a80615f6bada74c7)

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2019-08-21 15:29:02 +01:00
Alistair Francis
e7810c7601 qemuriscv: Build uImage for RISC-V machines
(From OE-Core rev: 12dc5569d832d57b52ed68bc9009506b2d183795)

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2019-06-21 00:33:22 +01:00
Alistair Francis
aad4228593 qemuriscv64: Add the QEMU RISC-V 64-bit machine
The include is split ready to add the 32-bit RISC-V machine as soon as
glibc supports 32-bit RISC-V.

This is based on the work in the meta-riscv layer, thanks to Khem for
starting this.

(From OE-Core rev: 11b6020dff4550fc3a42e04bc1e86baf37942c62)

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2019-06-19 22:13:39 +01:00