Commit Graph

311 Commits

Author SHA1 Message Date
Zubair Lutfullah Kakakhel
6eb35af19a arch-mips: Add MIPS 64r6 N32 tune
Add MIPS64R6-n32 tuning options.

(From OE-Core rev: e723dbb9614f7d7e7e158bc9afd0b2bfac0fbee2)

Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-12-22 08:50:16 +00:00
Joshua Lock
c4e2c59088 meta: remove True option to getVar calls
getVar() now defaults to expanding by default, thus remove the True
option from getVar() calls with a regex search and replace.

Search made with the following regex: getVar ?\(( ?[^,()]*), True\)

(From OE-Core rev: 7c552996597faaee2fbee185b250c0ee30ea3b5f)

Signed-off-by: Joshua Lock <joshua.g.lock@intel.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-12-16 10:23:23 +00:00
André Draszik
a46cebeaf9 arch-mips: sort new MACHINEOVERRIDES by priority
While I couldn't find explicit documentation, it appears
that the list of MACHINEOVERRIDES should be sorted from
less specific to more specific left to right, so that
more specific overrides take precedence.

(From OE-Core rev: 59c724db5628775e77fa090183897c6ae0fdf9a8)

Signed-off-by: André Draszik <adraszik@tycoint.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-12-07 10:38:05 +00:00
Andre McCurdy
9d61524695 tune-cortexa*.inc: squash whitespace within TUNE_FEATURES strings
TUNE_FEATURES is include in BUILDCFG_VARS, so any whitespace is
visible to the user during the build process. Remove the extra
whitespace added during the 2.1 development cycle:

  http://git.openembedded.org/openembedded-core/commit/?id=f774b44fa007a2a756ada892ede832b1251d940c

For consistency, squash whitespace within PACKAGE_EXTRA_ARCHS strings
too.

(From OE-Core rev: 5610c6397ee098dd998b7417b343494de77179f9)

Signed-off-by: Andre McCurdy <armccurdy@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-12-07 10:38:00 +00:00
Khem Raj
7af36a74d7 arch-arm64.inc: Include arch-armv7ve.inc
All armv8 implementations from a53 - a73 supports
virtual extentions

(From OE-Core rev: f896375c60d8ce0f1293f5329163172e946f46df)

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-11-30 15:48:06 +00:00
Zubair Lutfullah Kakakhel
3f1ec19b86 arch-mips: Add MACHINEOVERRIDES variables to reduce duplication
In some cases, each MIPS variant in a recipe requires a duplicate
line. Even if the passed flag is the same.

Add global MACHINEOVERRIDES variables for the following
 * mipsarch		: All MIPS
 * mipsarch{eb,el}	: All MIPS Big/Little Endian
 * mipsarchr6		: All MIPS R6
 * mipsarcho32		: All MIPS o32 Endian Independent
 * mipsarchn32		: All MIPS n32 Endian Independent
 * mipsarchn64		: All MIPS n64 Endian Independent
 * mipsarcho32{eb,el}	: All MIPS o32 Big/Little Endian
 * mipsarchn32{eb,el}	: All MIPS n32 Big/Little Endian
 * mipsarchn64{eb,el}	: All MIPS n64 Big/Little Endian

This is intended to reduce duplications in recipes

[YOCTO #10404]

(From OE-Core rev: 0d2205f26e5ece089630f72af2bd5f0931e851c3)

Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-11-15 15:19:52 +00:00
Zubair Lutfullah Kakakhel
4caa6168b8 arch-mips: Add o32 in TUNE_FEATURES for MIPS32R6
mips32r6 tunings should have o32 ABI flag in TUNE_FEATURES

(From OE-Core rev: b2320b7a183dac6b1fcf56db6eadd895554886e1)

Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-11-15 15:19:52 +00:00
Todor Minchev
33ceab7979 runqemu: add user mode (SLIRP) support to x86 QEMU targets
Using 'slirp' as a command line option to runqemu will start QEMU
with user mode networking instead of creating tun/tap devices.
SLIRP does not require root access. By default port 2222 on the
host will be mapped to port 22 in the guest. The default port
mapping can be overwritten with the QB_SLIRP_OPT variable e.g.

QB_SLIRP_OPT = "-net nic,model=e1000 -net user,hostfwd=tcp::2222-:22"

(From OE-Core rev: 80e6fc678f3dcd774d9376cdf2a6afcba2cd0b09)

Signed-off-by: Todor Minchev <todor.minchev@linux.intel.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-11-06 23:35:35 +00:00
Jussi Kukkonen
a1668c8721 conf: Use xf86-input-libinput by default
Don't install legacy X input drivers for any machines by default,
RRECOMMEND xf86-input-libinput instead.

This is the setup suggested by upstream: install only libinput by
default, but let niche legacy drivers sort higher in configuration
so they get chosen if installed. So the order is:
 evdev < libinput < (synaptics|vmmouse|...)

This also removes vmmouse X driver from the qemu config. If a VMware
virtual mouse device really needs to be supported, we should enable
CONFIG_MOUSE_PS2_VMMOUSE in kernel instead: that is directly supported
by the libinput X driver.

Fixes [YOCTO #10195].

(From OE-Core rev: 2d005faff6341a81a2afae28860101ba9db51ae8)

Signed-off-by: Jussi Kukkonen <jussi.kukkonen@intel.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-11-01 10:05:45 +00:00
Robert Yang
34b16fea56 arch-mips.inc: remove duplicates from PACKAGE_ARCHS
Fixed:
MACHINE = "qemumips64"
DEFAULTTUNE = "mips64-o32"

$ bitbake linux-yocto
ERROR:  OE-core's config sanity checker detected a potential misconfiguration.
    Either fix the cause of this error or at your own risk disable the checker (see sanity.conf).
    Following is the list of potential problems / advisories:

    Error, the PACKAGE_ARCHS variable contains duplicates. The following archs are listed more than once: mips64-o32

(From OE-Core rev: e57d70e6803c63823ae3a7c7971fc06db3748b68)

Signed-off-by: Robert Yang <liezhi.yang@windriver.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-10-15 10:01:43 +01:00
Saul Wold
f683658705 x86-base: Update version to 4.8
This update will avoid confusion with other parts of OE-Core that
set the kernel version to 4.8 for qemux86* and genericx86*.

(From OE-Core rev: 7f8c36d8aa00da109e842c790c6a0ab7a849de72)

Signed-off-by: Saul Wold <sgw@linux.intel.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-10-15 10:01:42 +01:00
Zubair Lutfullah Kakakhel
8be92dcd59 arch-mips: Add mipsisa{32, 64}r6{el, } tunes
Add support for MIPS Release 6 ISA and the various tune
configurations.

This patch adds the tunes for 32r6 and 64r6 n64 and not the n32
variants at the moment.

Release 6 onwards, the tuples are now
 - mipsisa32r6-linux-gnu
 - mipsisa32r6el-linux-gnu
 - mipsisa64r6-linux-gnuabi64
 - mipsisa64r6el-linux-gnuabi64
 - mipsisa64r6-linux-gnuabin32
 - mipsisa64r6el-linux-gnuabin32

For more details, check https://wiki.debian.org/Multiarch/Tuples

(From OE-Core rev: 6b2e0c60c3222a13b33284f258d5c340222d759f)

Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-10-07 16:43:57 +01:00
Nathan Rossi
de4fffe558 machine/qemu*: Add comment regarding the reason for virtio-rng-pci
Bring across the comment that was in runqemu regarding why the
virtio-rng-pci device was needed. This comment is added to each location
where the virtio-rng-pci device is added.

(From OE-Core rev: bc5d1fdea674e842e4b0c45b38782930ec133051)

Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-09-28 10:16:03 +01:00
Zubair Lutfullah Kakakhel
8dfcfbeb14 arch-mips: Add mips64-o32 tunes
Add mips64 + o32 rootfs abi tune configurations

(From OE-Core rev: ae5073c4abd8935c01d14d3e6395124f815bd10b)

Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-09-24 07:30:10 +01:00
Otavio Salvador
bad17ae72f tune-ppc[65]00.inc: Disable QEMU usermode usage
The QEMU usermode fails with invalid instruction error when used with those tunes.

The issue is being tracked in [YOCTO: #10304].

(From OE-Core rev: f9fd1a7fdf03ade9735e137a526a54e723d03dc6)

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-09-24 07:30:10 +01:00
Zubair Lutfullah Kakakhel
2f4b80b306 arch-mips: Add mips64r2 tunes
Add MIPS64r2 optimizations

(From OE-Core rev: 4c10376bdfd54af75de840bd4a31386e6e89477e)

Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-09-24 07:30:09 +01:00
Nathan Rossi
deba7cac00 runqemu: Move virtio RNG to machine configuration
Not all QEMU machines (outside of those available in OE-Core) are
capable of using the virtio-rng-pci device due to various machine models
not having a pci/virtio bus. This makes it such that the use of the
'-device virtio-rng-pci' flag to QEMU is machine specific.

This patch removes the general addition of the flag to all runqemu
targets and adds the flag into the QB_OPT_APPEND for all the qemu*
machines in OE-Core that support its use (which is all of them).

(From OE-Core rev: e890c05e66a21702e9e8ccce794b74cb7f5518ed)

Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-09-23 14:56:39 +01:00
Saul Wold
8d3f71234f qemuboot-x86: Add task_timeout = -1 to uvesafb
This causes the default timeout to be set to infinity, it will still report out
every 5000 milliseconds

(From OE-Core rev: fd9e1ba8f70402bd3c4b873d349057f96f5bcb19)

Signed-off-by: Saul Wold <sgw@linux.intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-09-16 15:24:03 +01:00
Robert Yang
638d19adb4 qemu.inc: inherit qemuboot.bbclass
All qemu boards should be able to boot by runqemu.

(From OE-Core rev: 5174889d59a5d6da29b4290376010dd176767e1f)

Signed-off-by: Robert Yang <liezhi.yang@windriver.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-09-09 12:07:32 +01:00
Robert Yang
09a77107e7 qemumips/qemumips64.conf: set vars for runqemu
Add qemuboot-mips.inc to reduce duplicated code, the various mips bsps
which can be boot by runqemu can require qemuboot-mips.inc

(From OE-Core rev: cb28128477e98ed7dc7a90dd197f6dd04cf75be0)

Signed-off-by: Robert Yang <liezhi.yang@windriver.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-09-09 12:07:31 +01:00
Robert Yang
64da0d7799 qemux86.conf/qemux86-64.conf: set vars for runqemu
Add qemuboot-x86.inc to reduce duplicated code, the x86/x86_64 bsps
which can be boot by runqemu can require qemuboot-x86.inc.

(From OE-Core rev: b5ff3dda2a576ba7e5d68198ea6c6eb49cf80eb8)

Signed-off-by: Robert Yang <liezhi.yang@windriver.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-09-09 12:07:31 +01:00
Alexander Kanavin
51afd4515f arch-mips.inc: Disable QEMU usermode usage when building with n32 ABI
QEMU usermode doesn't support n32 binaries, erroring with "Invalid
ELF image for this architecture".

(From OE-Core rev: 66aa39a959bd41f7063fe64a9225eb9fd6c3293b)

Signed-off-by: Alexander Kanavin <alexander.kanavin@linux.intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-09-03 23:45:54 +01:00
André Draszik
1ebec491aa tune-mips-24k: add QEMU_EXTRAOPTIONS for DSP and MIPS16e cores
The core emulated by default by qemu-mips(el) just crashes with
illegal instruction when encountering DSP and/or MIPS16e
instructions - we have to specify a CPU that supports the extra
instructions.

This is an issue when generating a rootfs and e.g. running some
of the package postinstall scriptlets.

The patch to qemu to add 24KEc as a CPU has been accepted
upstream, so let's use that CPU here as well as needed.

(From OE-Core rev: 8af17075f56241dd8f3ea86c609adbd73f248218)

Signed-off-by: André Draszik <git@andred.net>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-08-01 11:47:11 +01:00
Zhenhua Luo
6bb3069eef tune-ppce500mc.inc: pass -mcpu=e500mc for ppce500mc kernel compile
Currently the -mcpu parameter is not passed to cross gcc when assembling
kernel .S file, the implicit -mcpu option that defaults to the latest
server cpu might casuse incorrect assembling.

A existent case is that wait instruction of ppce500mc is incorrectly assembled
to power9 version with default -mcpu setting, accordingly kernel boot calltrace
happend when wait instruction is executed on ppce500mc targets.

(From OE-Core rev: b17f91ed06a604e3d356fe17756bfe2ca61594b7)

Signed-off-by: Zhenhua Luo <zhenhua.luo@nxp.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-07-10 14:12:17 +01:00
André Draszik
a9120996e0 mips: add tunes for (some) 24K cores
- add 24kc big and little endian, which is based on mips32r2 w/o FPU
- add 24kec which is 24kc + DSP
- both can have the MIPS16e ASE enabled in their tunes

(From OE-Core rev: cccd8b09523d8f0c1df97d08181737681db13f37)

Signed-off-by: André Draszik <adraszik@tycoint.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-06-12 23:47:19 +01:00
André Draszik
7acb3db0b1 mips: add a tune for using MIPS16e ASE instructions
The MIPS16e instruction set still has to be enabled by setting
MIPS_INSTRUCTION_SET = 'mips16e'
in e.g. distro.conf and can be disabled on a per-recipe basis as
needed.

This is a similar approach as is available on ARM for Thumb support.

Note that contrary to the ARM Thumb support in OE, we do add a new
OVERRIDE (mips16e), as there are some recipes in OE that need to be
compiled slightly differently if mips16e mode is requested.

(From OE-Core rev: e9d8b02a42eb08802e202770409cb5378b79b281)

Signed-off-by: André Draszik <adraszik@tycoint.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-06-12 23:47:18 +01:00
André Draszik
45dd3d28e4 feature-arm-vfp.inc: fix overzealous ARMPKGSFX_FPU modification
Since commit 972b4fc (feature-arm-neon.inc: restore vfpv3-d16 support)
we're replacing _all_ dashes (-) in ARMPKGSFX_FPU, which is causing
problems for all legitimate uses of the dash as TUNE_PKGARCH doesn't
have the right value anymore:

E.g. on raspberrypi2:

ERROR:  OE-core's config sanity checker detected a potential misconfiguration.
    Either fix the cause of this error or at your own risk disable the checker (see sanity.conf).
    Following is the list of potential problems / advisories:

    Error, the PACKAGE_ARCHS variable (all any noarch armv5hf-vfp armv5thf-vfp
armv5ehf-vfp armv5tehf-vfp armv6hf-vfp armv6thf-vfp armv7ahf-vfp
armv7at2hf-vfp armv7vehf-vfp armv7vet2hf-vfp armv7vehf-neon armv7vet2hf-neon
armv7vehf-neon-vfpv4 armv7vet2hf-neon-vfpv4 cortexa7hf-vfp cortexa7hf-neon
cortexa7hf-neon-vfpv4 cortexa7t2hf-vfp cortexa7t2hf-neon
cortexa7t2hf-neon-vfpv4 raspberrypi3) for DEFAULTTUNE (cortexa7thf-neon-vfpv4)
does not contain TUNE_PKGARCH (cortexa7hf-neonvfpv4).

Fix this by being more explicit about what we're modifying.

Reported-by: Khem Raj <raj.khem@gmail.com>
(From OE-Core rev: cf82db2ba732031f392760e4f363e8b608e6fae3)

Signed-off-by: André Draszik <git@andred.net>
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-05-14 23:05:12 +01:00
André Draszik
c7bf1a871a feature-arm-neon.inc: restore vfpv3-d16 support
Commit 6661718 (feature-arm-{neon,vfp}.inc: refactor and fix issues)
effectively changed the gcc -mfpu= option from -mfpu=vfpv3-d16 to
-mfpu=vfpv3d16, which gcc doesn't understand.

Restore the original value.

After doing that, we also need to adjust ARMPKGSFX_FPU which should
contain the same value without dash '-' as it is used that way
throughout.

(From OE-Core rev: 972b4fc459258572eeaad8af91e48ee9f0acade7)

Signed-off-by: André Draszik <git@andred.net>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-05-11 10:33:42 +01:00
André Draszik
24eb9b1dfb tune-mips32r2.inc: add soft-float variants
(From OE-Core rev: 739da8b205067588419303ec2bbb1d92a82cdae9)

Signed-off-by: André Draszik <adraszik@tycoint.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-05-06 10:31:15 +01:00
Alexander Kanavin
7f70b1065a arch-powerpc64.inc: disable the use of qemu usermode on ppc64
It simply does not work at all:
https://lists.yoctoproject.org/pipermail/yocto/2016-April/029698.html

(From OE-Core rev: d044743cdc415745e68f3e26a3a7e2c94caecd93)

Signed-off-by: Alexander Kanavin <alexander.kanavin@linux.intel.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-05-06 10:31:15 +01:00
Denys Dmytriyenko
de7562620e arch-armv7ve: inherit armv7a tunes file
armv7a is a subset of armv7ve:
https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html

   -march=armv7ve is the armv7-a architecture with virtualization extensions.

By inheriting armv7a from armv7ve it's possible for e.g. Cortex-A15 machines
to include tune-cortexa15.inc and have a full range of optimizations, but
set DEFAULTTUNE as "armv7a" to produce binaries compatible with Cortex-A8
machines, etc.

(From OE-Core rev: 5bf5e68e540dc4e034288702094d306ebd19fef9)

Signed-off-by: Denys Dmytriyenko <denys@ti.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-05-06 10:31:14 +01:00
Alexander Kanavin
abd5b24ff7 bitbake.conf: rename 'gobject-introspection-data' machine feature to 'qemu-usermode'
The new value is more general and better reflects what having the feature really means.
Introspection data, then, is built only if 'gobject-introspection-data' is in
DISTRO_FEATURES and 'qemu-usermode' is in MACHINE_FEATURES.

(From OE-Core rev: 9927a3d72e2272d8e3dc4785ba02e27802ee1c6c)

Signed-off-by: Alexander Kanavin <alexander.kanavin@linux.intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-03-28 15:55:49 +01:00
Maxin B. John
6462d08dc6 x86-base.inc: suggest the latest kernel
Use latest 4.x kernel instead of 3.x version

(From OE-Core rev: 138a03308fb24936466beb082b350d872ad423a6)

Signed-off-by: Maxin B. John <maxin.john@intel.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-03-25 10:29:15 +00:00
Jens Rehsack
cd17ab0335 tune-arm926ejs: Handle missing thumb suffix
When enabling tune for arm926ejs, poky optionally appends suffixes for
thumb and dsp support. Since sometimes arm926ejse (ARM code) and sometime
arm926ejste (thumb code) is used in PACKAGE_ARCH, allow both.

(From OE-Core rev: dbd7fd1cbbc3e7003a48542642acdc80dca3f514)

Signed-off-by: Jens Rehsack <sno@netbsd.org>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-03-25 10:29:15 +00:00
Richard Purdie
0dea50e423 machine/include/arch-x86: Make x32 ABI not supporting gobject-introspection-data
x32 isn't supported by user mode qemu so we can't build
gobject-introspection-data, so disable it in this case.

(From OE-Core rev: 4ee1eb8ddd3fbe144fbaeb32e07b66e191aa7548)

(From OE-Core rev: 04ecebd4a79f80c5bb054a8b21df6f555631ed8b)

Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Signed-off-by: Alexander Kanavin <alexander.kanavin@linux.intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-03-12 22:11:46 +00:00
Chang Rebecca Swee Fun
e8254bc2f1 tune-corei7.inc: Fix PACKAGE_EXTRA_ARCHS for corei7-32
Change the name to core2-32 from core2.

There's no AVAILTUNES with the name core2. Make sure that we specify
the correct TUNE name so PACKAGE_EXTRA_ARCHS is expanded correctly.

[ YOCTO #9197 ]

(From OE-Core rev: 0903d6f0098f112d4263812df109e0c44c166db8)

Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
Signed-off-by: Anuj Mittal <anujx.mittal@intel.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-03-09 16:58:11 +00:00
Trevor Woerner
e395e81d26 tune-cortexa17.inc: apply changes similar to a15
Apply the same sort of changes to the Cortex-A17 tune as were done in commit
35392025f3236f5e5393f9cf0857732da9a2e503.

(From OE-Core rev: fb981f1a5be2277ae4966527fdebe196022d3826)

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-03-07 11:55:37 +00:00
Nathan Rossi
6518db4707 feature-arm-thumb.inc: Fix thumb tune override warning
Fix the quotes in the bb.utils.contains feature check so that the call
results in a boolean value instead of a string, which allows the warning
check to occur.

(From OE-Core rev: aac3919f538a5608ffcc3af5bd8f121e3c2c3469)

Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-03-07 00:11:38 +00:00
Richard Tollerton
b4df0059e2 tune-cortexa9.inc: add vfpv3 tunes
Define tunnings to enable 32 register VFPv3 for cortexa9 processor cores

More details: http://www.arm.com/products/processors/technologies/vector-floating-point.php

(From OE-Core rev: d9635cc96ad1ddeb944bba375b5b55149867966c)

Signed-off-by: Richard Tollerton <rich.tollerton@ni.com>
Signed-off-by: Ioan-Adrian Ratiu <adrian.ratiu@ni.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-02-28 11:32:57 +00:00
Saul Wold
6740dd5579 qemu.inc: Add rng-tools to qemu images
This patch adds rng-tools to MACHINE_EXTRA_RRECOMMENDS so that can be
used to provide the additional entropy to prevent hangs in getrandom()
for qemu images

[YOCTO #8681]
[YOCTO #8816]

(From OE-Core rev: cb512c0c189f5a1196da233042113a708243daa0)

Signed-off-by: Saul Wold <sgw@linux.intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-02-15 16:28:43 +00:00
Ross Burton
5b2b343453 tune-corei7.inc: tell qemu to emulate a matching processor
If tune-corei7 is in use then the target binaries may contain instructions that
qemu-x86-64 can't execute by default, resulting in errors on rootfs construction:

NOTE: Running intercept scripts:
NOTE: > Executing update_font_cache intercept ...
qemu: uncaught target signal 4 (Illegal instruction) - core dumped

In this case the instruction is popcnt, part of SSE4.2, so tell Qemu to emulate
the CPU that the tune targets (in this case, Nehalem). Also pass check=false as
the Nehalem machine supports VME but user-space qemu doesn't, which produces a
warning unless CPUID checking is disabled.

[ YOCTO #8888 ]

(From OE-Core rev: fef106b9b97ec48bad2b9a084357b884f653d6c8)

Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-02-11 12:27:46 +00:00
Andre McCurdy
654eddce35 machine/include: drop tune-cortexm*.inc and tune-cortexr4.inc
The Cortex M1, M3 and R4 CPU tuning files are poorly tested (if at
all). They have no obvious users either inside or outside oe-core.

Until OE officially gains support for CPUs without an MMU, these
tuning files are probably better maintained outside of oe-core (e.g.
in a separate meta-nommu layer).

(From OE-Core rev: 7a1445c55de904115b950c8e50432a9f11f02208)

Signed-off-by: Andre McCurdy <armccurdy@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-02-02 14:44:16 +00:00
Khem Raj
f4f9f2f4d9 gcc, qemuppc: Explicitly disable forcing SPE flags
G4 does not have SPE, so we make that explicit in the tune files and
since we emulate G4 when building Qemu, we ensure it for qemuppc as
well.

GCC config for powerpc-linux is made to include SPE by default which is
equivalent if the tripet was powerpc-linux*spe, this forces gcc to
configure assembler to enable -mspe by default, when we do that then the
kernel fails to compile with binutils 2.26, since newer assembler is
smart to detect the tlbia instructions are not compatible with SPE and
hence the kernel build breaks rightly. We configure the kernel for G4 as
well where it enables tlbia instrucitons rightly so because it thinks
its being configured for power4. So we keep the options but do not force
-mspe down to assembler as default.

(From OE-Core rev: 7a51776a830167e43cbd185505f62f328704e271)

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-01-31 13:29:48 +00:00
Martin Jansa
f29d642c2b tune-*: use mcpu instead of mtune for ARM tunes
* since:
  commit cffda9a821a3b83a8529d643c567859e091c6846
  Author: Martin Jansa <Martin.Jansa@gmail.com>
  Date:   Tue Sep 11 17:05:45 2012 +0000

      arch-arm: define different ARMPKGARCH when different CCARGS are used
  we don't need to worry about e.g. cortexa7 device upgrading
  binary package from armv7a feed which would be built with
  -mcpu=cortexa15, so we can use -mcpu instead of -mtune, because
  we won't share the binary feed with MACHINEs built with different
  tune.

(From OE-Core rev: f7bb2d4cf18ca8d2a90b4b3b5c6c48dad106ca28)

Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-01-07 13:40:19 +00:00
Martin Jansa
c6a19917ec arch-armv7ve: add tune include for armv7ve and use it from cortexa7 and cortexa15
* be aware that this -march value is available only in gcc-4.9 and
  newer:
  https://gcc.gnu.org/bugzilla/show_bug.cgi?id=57907
* -mcpu=cortex15 and -mcpu=cortexa7 conflict with -march=armv7a
  We either have to stop putting -march in default CCARGS or at
  least set it compatible one like this patch does.

(From OE-Core rev: 35392025f3236f5e5393f9cf0857732da9a2e503)

Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-01-07 13:40:19 +00:00
Martin Jansa
21d61fa728 cortexa{7,15,17}: add VFPv4 tunes
* it was added only to hf cortexa7 in:
  commit e97d152ca13556b41a236c1a4cfb11e77ff857d7
  Author: Kristof Robot <krirobo@gmail.com>
  Date:   Sun Jan 26 10:03:56 2014 +0100

      Add Cortex A7 support for NEONv2 & FPv4

* add it to softfp cortexa7 and both versions for cortexa15 and
  cortexa17 tunes

(From OE-Core rev: 109c26d99b6324c1412f440fef85f090518f6da0)

Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-01-07 13:40:19 +00:00
Martin Jansa
7f2cb68524 feature-arm-vfp.inc: Further simplify with TUNE_CCARGS_MFLOAT
* add TUNE_CCARGS_MFLOAT variable which is used to set -mfloat-abi
  parameter as well as ARMPKGSFX_EABI suffix in TUNE_PKGARCH and
  TARGET_FPU
* TARGET_FPU was using ARMPKGSFX_FPU, but in most cases we use it
  only to distinguish between hard and soft abi, not various -mfpu
  variants which can appear in ARMPKGSFX_FPU

(From OE-Core rev: 10bece310ca6e0bbae28665f873f907d751d1057)

Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-01-07 13:40:19 +00:00
Martin Jansa
e9b2ffc0fe feature-arm-{neon,vfp}.inc: refactor and fix issues
* respect all 4 vfp options ('vfp', 'vfpv3d16', 'vfpv3', 'vfpv4') when
  setting -mfloat-abi and ARMPKGSFX_EABI, without this change it wasn't
  possible to use call-convention hard together with vfpv4
* move 'vfpv3d16', 'vfpv3', 'vfpv4' support from
  feature-arm-vfp.inc
  to
  feature-arm-neon.inc
  the main difference is that feature-arm-vfp.inc is included in
  arch-armv5.inc while feature-arm-neon.inc only in armv7*.inc, so
  these options should be added to TUNEVALID also only for armv7*
  MACHINEs.
* support vfpv4 with or without neon
  when both vfpv4 and neon are in TUNE_FEATURES we want to set only one
  -mfpu parameter and to neon-vfpv4
* prevent multiple appends to ARMPKGSFX_FPU, we don't want to include
  e.g. -vfp as well as -vfpv4 when both "vfp" and "vfpv4" are in
  TUNE_FEATURES
* add -mfpu=vfp for tunes with "vfp" in TUNE_FEATURES - before that we
  were only adding -vfp to ARMPKGSFX_FPU
* add TUNE_CCARGS_MFPU variable which is used to set -mfpu parameter as
  well as ARMPKGSFX_FPU suffix in TUNE_PKGARCH, all enabled values are
  appended to it based on TUNE_FEATURES and then the last one is used
  in the actual param and suffix
* this prevents multiple -mfpu options in TUNE_CCARGS

* !!!
  This means we need to change TUNE_PKGARCH and PACKAGE_EXTRA_ARCHS for
  vfpv4, vfpv3d16, vfpv3 tunes, because the -vfp* isn't prependend
  multiple times. If you're using one of these new DEFAULTTUNES (which
  were at least partially broken anyway) and depend on working binary
  package feed upgrade-path, then don't forget to migrate PR service
  database to new TUNE_PKGARCH.

(From OE-Core rev: 6661718158f8fdcdf63b0d48e8fe72d3ac4778f2)

Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-01-07 13:40:19 +00:00
Martin Jansa
45f726cc58 arch-armv7a.inc: add vfpv4 support also to softfp and big endiand tunes
(From OE-Core rev: b4e90a15e6b1e5639b2039adeae26f2c780a7864)

Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-01-07 13:40:19 +00:00
Martin Jansa
ebe83589ba arch-armv7a.inc: Fix PACKAGE_EXTRA_ARCHS for tune-armv7atb-vfpv3, tune-armv7atb-vfpv3d16, cortexa7thf-neon-vfpv4
(From OE-Core rev: 8c12a71e41fb53a014b8357ae9b30bfd422f86ec)

Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2016-01-07 13:40:18 +00:00