mirror of
https://git.yoctoproject.org/poky
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4c2d0b1205
Some of these are clearly dead, e.g. one binutils patch reverts the effects of the earlier one. This also removes the uclibc site files. We now have mechanisms to allow these to be extended from another layer should someone ever wish to do that. (From OE-Core rev: e01e7c543a559c8926d72159b5cd55db0c661434) Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
187 lines
7.9 KiB
Plaintext
187 lines
7.9 KiB
Plaintext
# This class exists to provide information about the targets that
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# may be needed by other classes and/or recipes. If you add a new
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# target this will probably need to be updated.
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#
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# Returns information about 'what' for the named target 'target'
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# where 'target' == "<arch>-<os>"
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#
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# 'what' can be one of
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# * target: Returns the target name ("<arch>-<os>")
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# * endianness: Return "be" for big endian targets, "le" for little endian
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# * bits: Returns the bit size of the target, either "32" or "64"
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# * libc: Returns the name of the c library used by the target
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#
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# It is an error for the target not to exist.
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# If 'what' doesn't exist then an empty value is returned
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#
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def siteinfo_data(d):
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archinfo = {
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"allarch": "endian-little bit-32", # bogus, but better than special-casing the checks below for allarch
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"aarch64": "endian-little bit-64 arm-common arm-64",
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"aarch64_be": "endian-big bit-64 arm-common arm-64",
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"arm": "endian-little bit-32 arm-common arm-32",
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"armeb": "endian-big bit-32 arm-common arm-32",
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"avr32": "endian-big bit-32 avr32-common",
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"bfin": "endian-little bit-32 bfin-common",
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"epiphany": "endian-little bit-32",
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"i386": "endian-little bit-32 ix86-common",
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"i486": "endian-little bit-32 ix86-common",
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"i586": "endian-little bit-32 ix86-common",
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"i686": "endian-little bit-32 ix86-common",
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"ia64": "endian-little bit-64",
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"microblaze": "endian-big bit-32 microblaze-common",
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"microblazeeb": "endian-big bit-32 microblaze-common",
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"microblazeel": "endian-little bit-32 microblaze-common",
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"mips": "endian-big bit-32 mips-common",
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"mips64": "endian-big bit-64 mips-common",
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"mips64el": "endian-little bit-64 mips-common",
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"mipsisa64r6": "endian-big bit-64 mips-common",
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"mipsisa64r6el": "endian-little bit-64 mips-common",
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"mipsel": "endian-little bit-32 mips-common",
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"mipsisa32r6": "endian-big bit-32 mips-common",
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"mipsisa32r6el": "endian-little bit-32 mips-common",
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"powerpc": "endian-big bit-32 powerpc-common",
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"nios2": "endian-little bit-32 nios2-common",
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"powerpc64": "endian-big bit-64 powerpc-common",
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"ppc": "endian-big bit-32 powerpc-common",
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"ppc64": "endian-big bit-64 powerpc-common",
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"ppc64le" : "endian-little bit-64 powerpc-common",
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"sh3": "endian-little bit-32 sh-common",
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"sh4": "endian-little bit-32 sh-common",
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"sparc": "endian-big bit-32",
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"viac3": "endian-little bit-32 ix86-common",
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"x86_64": "endian-little", # bitinfo specified in targetinfo
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}
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osinfo = {
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"darwin": "common-darwin",
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"darwin9": "common-darwin",
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"linux": "common-linux common-glibc",
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"linux-gnu": "common-linux common-glibc",
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"linux-gnux32": "common-linux common-glibc",
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"linux-gnun32": "common-linux common-glibc",
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"linux-gnueabi": "common-linux common-glibc",
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"linux-gnuspe": "common-linux common-glibc",
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"linux-musl": "common-linux common-musl",
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"linux-musleabi": "common-linux common-musl",
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"linux-muslspe": "common-linux common-musl",
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"uclinux-uclibc": "common-uclibc",
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"cygwin": "common-cygwin",
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"mingw32": "common-mingw",
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}
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targetinfo = {
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"aarch64-linux-gnu": "aarch64-linux",
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"aarch64_be-linux-gnu": "aarch64_be-linux",
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"aarch64-linux-musl": "aarch64-linux",
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"aarch64_be-linux-musl": "aarch64_be-linux",
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"arm-linux-gnueabi": "arm-linux",
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"arm-linux-musleabi": "arm-linux",
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"armeb-linux-gnueabi": "armeb-linux",
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"armeb-linux-musleabi": "armeb-linux",
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"mips-linux-musl": "mips-linux",
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"mipsel-linux-musl": "mipsel-linux",
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"mips64-linux-musl": "mips64-linux",
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"mips64el-linux-musl": "mips64el-linux",
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"mips64-linux-gnun32": "mips-linux bit-32",
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"mips64el-linux-gnun32": "mipsel-linux bit-32",
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"mipsisa64r6-linux-gnun32": "mipsisa32r6-linux bit-32",
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"mipsisa64r6el-linux-gnun32": "mipsisa32r6el-linux bit-32",
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"powerpc-linux": "powerpc32-linux",
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"powerpc-linux-musl": "powerpc-linux powerpc32-linux",
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"powerpc-linux-gnuspe": "powerpc-linux powerpc32-linux",
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"powerpc-linux-muslspe": "powerpc-linux powerpc32-linux",
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"powerpc64-linux-gnuspe": "powerpc-linux powerpc64-linux",
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"powerpc64-linux-muslspe": "powerpc-linux powerpc64-linux",
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"powerpc64-linux": "powerpc-linux",
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"powerpc64-linux-musl": "powerpc-linux",
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"x86_64-cygwin": "bit-64",
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"x86_64-darwin": "bit-64",
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"x86_64-darwin9": "bit-64",
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"x86_64-linux": "bit-64",
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"x86_64-linux-musl": "x86_64-linux bit-64",
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"x86_64-elf": "bit-64",
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"x86_64-linux-gnu": "bit-64 x86_64-linux",
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"x86_64-linux-gnux32": "bit-32 ix86-common x32-linux",
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"x86_64-mingw32": "bit-64",
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}
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# Add in any extra user supplied data which may come from a BSP layer, removing the
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# need to always change this class directly
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extra_siteinfo = (d.getVar("SITEINFO_EXTRA_DATAFUNCS") or "").split()
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for m in extra_siteinfo:
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call = m + "(archinfo, osinfo, targetinfo, d)"
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locs = { "archinfo" : archinfo, "osinfo" : osinfo, "targetinfo" : targetinfo, "d" : d}
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archinfo, osinfo, targetinfo = bb.utils.better_eval(call, locs)
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hostarch = d.getVar("HOST_ARCH")
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hostos = d.getVar("HOST_OS")
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target = "%s-%s" % (hostarch, hostos)
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sitedata = []
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if hostarch in archinfo:
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sitedata.extend(archinfo[hostarch].split())
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if hostos in osinfo:
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sitedata.extend(osinfo[hostos].split())
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if target in targetinfo:
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sitedata.extend(targetinfo[target].split())
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sitedata.append(target)
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sitedata.append("common")
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bb.debug(1, "SITE files %s" % sitedata);
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return sitedata
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python () {
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sitedata = set(siteinfo_data(d))
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if "endian-little" in sitedata:
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d.setVar("SITEINFO_ENDIANNESS", "le")
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elif "endian-big" in sitedata:
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d.setVar("SITEINFO_ENDIANNESS", "be")
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else:
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bb.error("Unable to determine endianness for architecture '%s'" %
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d.getVar("HOST_ARCH"))
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bb.fatal("Please add your architecture to siteinfo.bbclass")
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if "bit-32" in sitedata:
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d.setVar("SITEINFO_BITS", "32")
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elif "bit-64" in sitedata:
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d.setVar("SITEINFO_BITS", "64")
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else:
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bb.error("Unable to determine bit size for architecture '%s'" %
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d.getVar("HOST_ARCH"))
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bb.fatal("Please add your architecture to siteinfo.bbclass")
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}
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def siteinfo_get_files(d, aclocalcache = False):
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sitedata = siteinfo_data(d)
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sitefiles = ""
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for path in d.getVar("BBPATH").split(":"):
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for element in sitedata:
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filename = os.path.join(path, "site", element)
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if os.path.exists(filename):
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sitefiles += filename + " "
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if not aclocalcache:
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return sitefiles
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# Now check for siteconfig cache files in the directory setup by autotools.bbclass to
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# avoid races.
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#
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# ACLOCALDIR may or may not exist so cache should only be set to True from autotools.bbclass
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# after files have been copied into this location. To do otherwise risks parsing/signature
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# issues and the directory being created/removed whilst this code executes. This can happen
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# when a multilib recipe is parsed along with its base variant which may be running at the time
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# causing rare but nasty failures
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path_siteconfig = d.getVar('ACLOCALDIR')
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if path_siteconfig and os.path.isdir(path_siteconfig):
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for i in os.listdir(path_siteconfig):
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if not i.endswith("_config"):
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continue
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filename = os.path.join(path_siteconfig, i)
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sitefiles += filename + " "
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return sitefiles
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#
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# Make some information available via variables
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#
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SITECONFIG_SYSROOTCACHE = "${STAGING_DATADIR}/${TARGET_SYS}_config_site.d"
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