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ba0326071e
This allows us to - test those more recent instruction sets (AVX, AVX2, BMI1, BMI2, F16C, FMA, LZCNT, MOVBE, XSAVE) - benefit from improved performance across the stack both in kvm-driven system emulation and when running on real silicon. For example, glibc: https://www.phoronix.com/news/Glibc-strcasecmp-AVX2-EVEX v4 level is adding AVX-512, which is far less established, particularly Intel has famously backtracked from supporting it in Alder Lake/Raport Lake client CPUs and AMD has only implemented it in very recent Zen4 products: https://www.phoronix.com/news/GCC-11-x86-64-Feature-Levels (From OE-Core rev: 6f2af1e5d1537b4d31e14946292bf58f0fd76fc9) Signed-off-by: Alexander Kanavin <alex@linutronix.de> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>