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poky/meta/recipes-devtools/rust/rust-common.inc
Richard Purdie 857cf2d7b3 rust-cross*: Fix OVERRRIDE references in task signature computation 
The oeqa selftest test:
   sstatetests.SStateTests.test_sstate_sametune_samesigs
which checks if the sstate checksums of two identical machines
(using the same tune) are the same, apart from changes within
the machine specific stamps directory, fails on the assertion:
   self.assertCountEqual(files1, files2)
due to the signature of various 32 bit package builds such as:
   x86_64-linux/lib32-rust-cross-i686
   x86_64-linux/rust-cross-i686
   x86-pokymllib32-linux/lib32-libstd-rs
   x86-pokymllib32-linux/lib32-rust
differing. Jumping down the rabbit hole past all the bitbake-diffsig
outputs that differ due to dependent hashes, you come to a  diff of:
   -Variable MACHINEOVERRIDES value is ${@bb.utils.contains('TUNE_FEATURES', 'mx32', 'x86-x32:', '', d)}${@bb.utils.contains('TUNE_FEATURES', 'm32', 'x86:', '', d)}qemuall:${MACHINE}
   +Variable MACHINEOVERRIDES value is ${@bb.utils.contains('TUNE_FEATURES', 'mx32', 'x86-x32:', '', d)}${@bb.utils.contains('TUNE_FEATURES', 'm32', 'x86:', '', d)}qemuall:${MACHINE}:qemux86
in
   stamps/x86_64-linux/rust-cross-i686/1.54.0-r0.do_rust_gen_target.<sig>

This is because there are two rust functions referencing OVERRIDES
related variables (target_is_armv7 and llvm_features_from_tune). These
indirectly influnce the build and should be excluded from the signatures
directly as is done in other toolchain recipes, e.g.:

   39bfa0dd32 recipes/*-cross recipes: ignore TARGET_ARCH sstate hash

(From OE-Core rev: 72d67410e92207a98a801ddf0cb9f1297a752975)

Signed-off-by: Randy MacLeod <Randy.MacLeod@windriver.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
2021-08-26 22:09:44 +01:00

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# Right now this is focused on arm-specific tune features.
# We get away with this for now as one can only use x86-64 as the build host
# (not arm).
# Note that TUNE_FEATURES is _always_ refering to the target, so we really
# don't want to use this for the host/build.
def llvm_features_from_tune(d):
f = []
feat = d.getVar('TUNE_FEATURES')
if not feat:
return []
feat = frozenset(feat.split())
mach_overrides = d.getVar('MACHINEOVERRIDES')
mach_overrides = frozenset(mach_overrides.split(':'))
if 'vfpv4' in feat:
f.append("+vfp4")
if 'vfpv3' in feat:
f.append("+vfp3")
if 'vfpv3d16' in feat:
f.append("+d16")
if 'vfpv2' in feat or 'vfp' in feat:
f.append("+vfp2")
if 'neon' in feat:
f.append("+neon")
if 'mips32' in feat:
f.append("+mips32")
if 'mips32r2' in feat:
f.append("+mips32r2")
if target_is_armv7(d):
f.append('+v7')
if ('armv6' in mach_overrides) or ('armv6' in feat):
f.append("+v6")
if 'armv5te' in feat:
f.append("+strict-align")
f.append("+v5te")
elif 'armv5' in feat:
f.append("+strict-align")
f.append("+v5")
if ('armv4' in mach_overrides) or ('armv4' in feat):
f.append("+strict-align")
if 'dsp' in feat:
f.append("+dsp")
if 'thumb' in feat:
if d.getVar('ARM_THUMB_OPT') == "thumb":
if target_is_armv7(d):
f.append('+thumb2')
f.append("+thumb-mode")
if 'cortexa5' in feat:
f.append("+a5")
if 'cortexa7' in feat:
f.append("+a7")
if 'cortexa9' in feat:
f.append("+a9")
if 'cortexa15' in feat:
f.append("+a15")
if 'cortexa17' in feat:
f.append("+a17")
if ('riscv64' in feat) or ('riscv32' in feat):
f.append("+a,+c,+d,+f,+m")
return f
llvm_features_from_tune[vardepvalue] = "${@llvm_features_from_tune(d)}"
# TARGET_CC_ARCH changes from build/cross/target so it'll do the right thing
# this should go away when https://github.com/rust-lang/rust/pull/31709 is
# stable (1.9.0?)
def llvm_features_from_cc_arch(d):
f = []
feat = d.getVar('TARGET_CC_ARCH')
if not feat:
return []
feat = frozenset(feat.split())
if '-mmmx' in feat:
f.append("+mmx")
if '-msse' in feat:
f.append("+sse")
if '-msse2' in feat:
f.append("+sse2")
if '-msse3' in feat:
f.append("+sse3")
if '-mssse3' in feat:
f.append("+ssse3")
if '-msse4.1' in feat:
f.append("+sse4.1")
if '-msse4.2' in feat:
f.append("+sse4.2")
if '-msse4a' in feat:
f.append("+sse4a")
if '-mavx' in feat:
f.append("+avx")
if '-mavx2' in feat:
f.append("+avx2")
return f
def llvm_features_from_target_fpu(d):
# TARGET_FPU can be hard or soft. +soft-float tell llvm to use soft float
# ABI. There is no option for hard.
fpu = d.getVar('TARGET_FPU', True)
return ["+soft-float"] if fpu == "soft" else []
def llvm_features(d):
return ','.join(llvm_features_from_tune(d) +
llvm_features_from_cc_arch(d) +
llvm_features_from_target_fpu(d))
## arm-unknown-linux-gnueabihf
DATA_LAYOUT[arm] = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
LLVM_TARGET[arm] = "${RUST_TARGET_SYS}"
TARGET_ENDIAN[arm] = "little"
TARGET_POINTER_WIDTH[arm] = "32"
TARGET_C_INT_WIDTH[arm] = "32"
MAX_ATOMIC_WIDTH[arm] = "64"
FEATURES[arm] = "+v6,+vfp2"
## armv7-unknown-linux-gnueabihf
DATA_LAYOUT[armv7] = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
LLVM_TARGET[armv7] = "${RUST_TARGET_SYS}"
TARGET_ENDIAN[armv7] = "little"
TARGET_POINTER_WIDTH[armv7] = "32"
TARGET_C_INT_WIDTH[armv7] = "32"
MAX_ATOMIC_WIDTH[armv7] = "64"
FEATURES[armv7] = "+v7,+vfp2,+thumb2"
## aarch64-unknown-linux-{gnu, musl}
DATA_LAYOUT[aarch64] = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
LLVM_TARGET[aarch64] = "${RUST_TARGET_SYS}"
TARGET_ENDIAN[aarch64] = "little"
TARGET_POINTER_WIDTH[aarch64] = "64"
TARGET_C_INT_WIDTH[aarch64] = "32"
MAX_ATOMIC_WIDTH[aarch64] = "128"
## x86_64-unknown-linux-{gnu, musl}
DATA_LAYOUT[x86_64] = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
LLVM_TARGET[x86_64] = "${RUST_TARGET_SYS}"
TARGET_ENDIAN[x86_64] = "little"
TARGET_POINTER_WIDTH[x86_64] = "64"
TARGET_C_INT_WIDTH[x86_64] = "32"
MAX_ATOMIC_WIDTH[x86_64] = "64"
## i686-unknown-linux-{gnu, musl}
DATA_LAYOUT[i686] = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
LLVM_TARGET[i686] = "${RUST_TARGET_SYS}"
TARGET_ENDIAN[i686] = "little"
TARGET_POINTER_WIDTH[i686] = "32"
TARGET_C_INT_WIDTH[i686] = "32"
MAX_ATOMIC_WIDTH[i686] = "64"
## XXX: a bit of a hack so qemux86 builds, clone of i686-unknown-linux-{gnu, musl} above
DATA_LAYOUT[i586] = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
LLVM_TARGET[i586] = "${RUST_TARGET_SYS}"
TARGET_ENDIAN[i586] = "little"
TARGET_POINTER_WIDTH[i586] = "32"
TARGET_C_INT_WIDTH[i586] = "32"
MAX_ATOMIC_WIDTH[i586] = "64"
## mips-unknown-linux-{gnu, musl}
DATA_LAYOUT[mips] = "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
LLVM_TARGET[mips] = "${RUST_TARGET_SYS}"
TARGET_ENDIAN[mips] = "big"
TARGET_POINTER_WIDTH[mips] = "32"
TARGET_C_INT_WIDTH[mips] = "32"
MAX_ATOMIC_WIDTH[mips] = "32"
## mipsel-unknown-linux-{gnu, musl}
DATA_LAYOUT[mipsel] = "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
LLVM_TARGET[mipsel] = "${RUST_TARGET_SYS}"
TARGET_ENDIAN[mipsel] = "little"
TARGET_POINTER_WIDTH[mipsel] = "32"
TARGET_C_INT_WIDTH[mipsel] = "32"
MAX_ATOMIC_WIDTH[mipsel] = "32"
## mips64-unknown-linux-{gnu, musl}
DATA_LAYOUT[mips64] = "E-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128"
LLVM_TARGET[mips64] = "${RUST_TARGET_SYS}"
TARGET_ENDIAN[mips64] = "big"
TARGET_POINTER_WIDTH[mips64] = "64"
TARGET_C_INT_WIDTH[mips64] = "64"
MAX_ATOMIC_WIDTH[mips64] = "64"
## mips64el-unknown-linux-{gnu, musl}
DATA_LAYOUT[mips64el] = "e-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128"
LLVM_TARGET[mips64el] = "${RUST_TARGET_SYS}"
TARGET_ENDIAN[mips64el] = "little"
TARGET_POINTER_WIDTH[mips64el] = "64"
TARGET_C_INT_WIDTH[mips64el] = "64"
MAX_ATOMIC_WIDTH[mips64el] = "64"
## powerpc-unknown-linux-{gnu, musl}
DATA_LAYOUT[powerpc] = "E-m:e-p:32:32-i64:64-n32"
LLVM_TARGET[powerpc] = "${RUST_TARGET_SYS}"
TARGET_ENDIAN[powerpc] = "big"
TARGET_POINTER_WIDTH[powerpc] = "32"
TARGET_C_INT_WIDTH[powerpc] = "32"
MAX_ATOMIC_WIDTH[powerpc] = "32"
## powerpc64le-unknown-linux-{gnu, musl}
DATA_LAYOUT[powerpc64le] = "e-m:e-i64:64-n32:64-v256:256:256-v512:512:512"
LLVM_TARGET[powerpc64le] = "${RUST_TARGET_SYS}"
TARGET_ENDIAN[powerpc64le] = "little"
TARGET_POINTER_WIDTH[powerpc64le] = "64"
TARGET_C_INT_WIDTH[powerpc64le] = "64"
MAX_ATOMIC_WIDTH[powerpc64le] = "64"
## riscv32-unknown-linux-{gnu, musl}
DATA_LAYOUT[riscv32] = "e-m:e-p:32:32-i64:64-n32-S128"
LLVM_TARGET[riscv32] = "${RUST_TARGET_SYS}"
TARGET_ENDIAN[riscv32] = "little"
TARGET_POINTER_WIDTH[riscv32] = "32"
TARGET_C_INT_WIDTH[riscv32] = "32"
MAX_ATOMIC_WIDTH[riscv32] = "32"
## riscv64-unknown-linux-{gnu, musl}
DATA_LAYOUT[riscv64] = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
LLVM_TARGET[riscv64] = "${RUST_TARGET_SYS}"
TARGET_ENDIAN[riscv64] = "little"
TARGET_POINTER_WIDTH[riscv64] = "64"
TARGET_C_INT_WIDTH[riscv64] = "64"
MAX_ATOMIC_WIDTH[riscv64] = "64"
def sys_for(d, thing):
return d.getVar('{}_SYS'.format(thing))
def prefix_for(d, thing):
return d.getVar('{}_PREFIX'.format(thing))
# Convert a normal arch (HOST_ARCH, TARGET_ARCH, BUILD_ARCH, etc) to something
# rust's internals won't choke on.
def arch_to_rust_target_arch(arch):
if arch == "i586" or arch == "i686":
return "x86"
elif arch == "mipsel":
return "mips"
elif arch == "mip64sel":
return "mips64"
elif arch == "armv7":
return "arm"
elif arch == "powerpc64le":
return "powerpc64"
else:
return arch
# generates our target CPU value
def llvm_cpu(d):
cpu = d.getVar('PACKAGE_ARCH')
target = d.getVar('TRANSLATED_TARGET_ARCH')
trans = {}
trans['corei7-64'] = "corei7"
trans['core2-32'] = "core2"
trans['x86-64'] = "x86-64"
trans['i686'] = "i686"
trans['i586'] = "i586"
trans['powerpc'] = "powerpc"
trans['mips64'] = "mips64"
trans['mips64el'] = "mips64"
trans['riscv64'] = "generic-rv64"
trans['riscv32'] = "generic-rv32"
if target in ["mips", "mipsel"]:
feat = frozenset(d.getVar('TUNE_FEATURES').split())
if "mips32r2" in feat:
trans['mipsel'] = "mips32r2"
trans['mips'] = "mips32r2"
elif "mips32" in feat:
trans['mipsel'] = "mips32"
trans['mips'] = "mips32"
try:
return trans[cpu]
except:
return trans.get(target, "generic")
TARGET_LLVM_CPU="${@llvm_cpu(d)}"
TARGET_LLVM_FEATURES = "${@llvm_features(d)}"
# class-native implies TARGET=HOST, and TUNE_FEATURES only describes the real
# (original) target.
TARGET_LLVM_FEATURES:class-native = "${@','.join(llvm_features_from_cc_arch(d))}"
def rust_gen_target(d, thing, wd, features, cpu, arch):
import json
sys = sys_for(d, thing)
prefix = prefix_for(d, thing)
features = features or d.getVarFlag('FEATURES', arch) or ""
features = features.strip()
# build tspec
tspec = {}
tspec['llvm-target'] = d.getVarFlag('LLVM_TARGET', arch)
tspec['data-layout'] = d.getVarFlag('DATA_LAYOUT', arch)
tspec['max-atomic-width'] = int(d.getVarFlag('MAX_ATOMIC_WIDTH', arch))
tspec['target-pointer-width'] = d.getVarFlag('TARGET_POINTER_WIDTH', arch)
tspec['target-c-int-width'] = d.getVarFlag('TARGET_C_INT_WIDTH', arch)
tspec['target-endian'] = d.getVarFlag('TARGET_ENDIAN', arch)
tspec['arch'] = arch_to_rust_target_arch(arch)
tspec['os'] = "linux"
if "musl" in tspec['llvm-target']:
tspec['env'] = "musl"
else:
tspec['env'] = "gnu"
if "riscv64" in tspec['llvm-target']:
tspec['llvm-abiname'] = "lp64d"
if "riscv32" in tspec['llvm-target']:
tspec['llvm-abiname'] = "ilp32d"
tspec['vendor'] = "unknown"
tspec['target-family'] = "unix"
tspec['linker'] = "{}{}gcc".format(d.getVar('CCACHE'), prefix)
tspec['ar'] = "{}ar".format(prefix)
tspec['cpu'] = cpu
if features != "":
tspec['features'] = features
tspec['dynamic-linking'] = True
tspec['executables'] = True
tspec['linker-is-gnu'] = True
tspec['linker-flavor'] = "gcc"
tspec['has-rpath'] = True
tspec['has-elf-tls'] = True
tspec['position-independent-executables'] = True
tspec['panic-strategy'] = d.getVar("RUST_PANIC_STRATEGY")
# write out the target spec json file
with open(wd + sys + '.json', 'w') as f:
json.dump(tspec, f, indent=4)
python do_rust_gen_targets () {
wd = d.getVar('WORKDIR') + '/targets/'
build_arch = d.getVar('BUILD_ARCH')
rust_gen_target(d, 'BUILD', wd, "", "generic", build_arch)
}
addtask rust_gen_targets after do_patch before do_compile
do_rust_gen_targets[dirs] += "${WORKDIR}/targets"
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