mirror of
https://git.yoctoproject.org/poky
synced 2026-01-29 21:08:42 +01:00
b189b2fb86
Without a specified ABI, rustc panics with the following error:
| thread 'rustc' panicked at compiler/rustc_codegen_ssa/src/back/metadata.rs:394:21:
| No ABI specified for this PPC64 ELF target.
This issue was occuring because of the following Rust commit:
9c1180b623
As noted in the upstream changes:
If the flags do not correctly indicate the ABI,
linkers such as ld.lld assume that the ppc64 object files are always ELFv2,
which leads to broken binaries if ELFv1 is used for the object files.
Because of this, it is now required to explicitly specify the ABI for PPC64 targets
using one of the following:
"elfv1" => EF_PPC64_ABI_ELF_V1,
"elfv2" => EF_PPC64_ABI_ELF_V2,
If no ABI is specified, the Rust compiler will panic with the error:
No ABI specified for this PPC64 ELF target
To address this:
- Set 'elfv2' for powerpc64le (little-endian), which mandates ELFv2 ABI.
- Set 'elfv1' for powerpc64 (big-endian), which defaults to ELFv1 ABI.
(From OE-Core rev: 6cee30b7941c22eef52011b6bac0d3c0d7944abe)
Signed-off-by: Deepesh Varatharajan <Deepesh.Varatharajan@windriver.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
469 lines
15 KiB
Plaintext
469 lines
15 KiB
Plaintext
#
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# Copyright OpenEmbedded Contributors
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#
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# SPDX-License-Identifier: MIT
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#
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# Right now this is focused on arm-specific tune features.
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# We get away with this for now as one can only use x86-64 as the build host
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# (not arm).
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# Note that TUNE_FEATURES is _always_ refering to the target, so we really
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# don't want to use this for the host/build.
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def llvm_features_from_tune(d):
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f = []
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feat = d.getVar('TUNE_FEATURES')
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if not feat:
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return []
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feat = frozenset(feat.split())
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mach_overrides = d.getVar('MACHINEOVERRIDES')
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mach_overrides = frozenset(mach_overrides.split(':'))
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if 'vfpv4' in feat:
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f.append("+vfp4")
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elif 'vfpv4d16' in feat:
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f.append("+vfp4")
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f.append("-d32")
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elif 'vfpv3' in feat:
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f.append("+vfp3")
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elif 'vfpv3d16' in feat:
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f.append("+vfp3")
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f.append("-d32")
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elif 'vfpv2' in feat or 'vfp' in feat:
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f.append("+vfp2")
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if 'neon' in feat:
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f.append("+neon")
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elif target_is_armv7(d):
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f.append("-neon")
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if 'mips32' in feat:
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f.append("+mips32")
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if 'mips32r2' in feat:
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f.append("+mips32r2")
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if target_is_armv7(d):
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f.append('+v7')
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if ('armv6' in mach_overrides) or ('armv6' in feat):
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f.append("+v6")
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if 'armv5te' in feat:
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f.append("+strict-align")
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f.append("+v5te")
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elif 'armv5' in feat:
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f.append("+strict-align")
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f.append("+v5")
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if ('armv4' in mach_overrides) or ('armv4' in feat):
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f.append("+strict-align")
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if 'dsp' in feat:
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f.append("+dsp")
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if 'thumb' in feat:
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if d.getVar('ARM_THUMB_OPT') == "thumb":
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if target_is_armv7(d):
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f.append('+thumb2')
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f.append("+thumb-mode")
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if 'cortexa5' in feat:
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f.append("+a5")
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if 'cortexa7' in feat:
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f.append("+a7")
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if 'cortexa9' in feat:
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f.append("+a9")
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if 'cortexa15' in feat:
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f.append("+a15")
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if 'cortexa17' in feat:
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f.append("+a17")
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if 'rv' in feat:
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if 'm' in feat:
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f.append("+m")
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if 'a' in feat:
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f.append("+a")
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if 'f' in feat:
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f.append("+f")
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if 'd' in feat:
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f.append("+d")
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if 'c' in feat:
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f.append("+c")
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if 'v' in feat:
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f.append("+v")
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if 'zicbom' in feat:
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f.append("+zicbom")
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if 'zicsr' in feat:
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f.append("+zicsr")
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if 'zifencei' in feat:
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f.append("+zifencei")
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if 'zba' in feat:
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f.append("+zba")
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if 'zbb' in feat:
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f.append("+zbb")
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if 'zbc' in feat:
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f.append("+zbc")
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if 'zbs' in feat:
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f.append("+zbs")
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return f
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llvm_features_from_tune[vardepvalue] = "${@llvm_features_from_tune(d)}"
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# TARGET_CC_ARCH changes from build/cross/target so it'll do the right thing
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# this should go away when https://github.com/rust-lang/rust/pull/31709 is
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# stable (1.9.0?)
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def llvm_features_from_cc_arch(d):
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f = []
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feat = d.getVar('TARGET_CC_ARCH')
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if not feat:
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return []
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feat = frozenset(feat.split())
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if '-mmmx' in feat:
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f.append("+mmx")
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if '-msse' in feat:
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f.append("+sse")
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if '-msse2' in feat:
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f.append("+sse2")
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if '-msse3' in feat:
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f.append("+sse3")
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if '-mssse3' in feat:
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f.append("+ssse3")
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if '-msse4.1' in feat:
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f.append("+sse4.1")
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if '-msse4.2' in feat:
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f.append("+sse4.2")
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if '-msse4a' in feat:
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f.append("+sse4a")
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if '-mavx' in feat:
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f.append("+avx")
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if '-mavx2' in feat:
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f.append("+avx2")
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return f
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def llvm_features_from_target_fpu(d):
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# TARGET_FPU can be hard or soft. +soft-float tell llvm to use soft float
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# ABI. There is no option for hard.
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fpu = d.getVar('TARGET_FPU')
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return ["+soft-float"] if fpu == "soft" else []
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def llvm_features(d):
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return ','.join(llvm_features_from_tune(d) +
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llvm_features_from_cc_arch(d) +
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llvm_features_from_target_fpu(d))
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llvm_features[vardepvalue] = "${@llvm_features(d)}"
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## arm-unknown-linux-gnueabihf
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DATA_LAYOUT[arm-eabi] = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
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TARGET_ENDIAN[arm-eabi] = "little"
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TARGET_POINTER_WIDTH[arm-eabi] = "32"
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TARGET_C_INT_WIDTH[arm-eabi] = "32"
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MAX_ATOMIC_WIDTH[arm-eabi] = "64"
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FEATURES[arm-eabi] = "+v6,+vfp2"
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## armv7-unknown-linux-gnueabihf
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DATA_LAYOUT[armv7-eabi] = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
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TARGET_ENDIAN[armv7-eabi] = "little"
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TARGET_POINTER_WIDTH[armv7-eabi] = "32"
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TARGET_C_INT_WIDTH[armv7-eabi] = "32"
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MAX_ATOMIC_WIDTH[armv7-eabi] = "64"
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FEATURES[armv7-eabi] = "+v7,+vfp2,+thumb2"
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## aarch64-unknown-linux-{gnu, musl}
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DATA_LAYOUT[aarch64] = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"
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TARGET_ENDIAN[aarch64] = "little"
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TARGET_POINTER_WIDTH[aarch64] = "64"
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TARGET_C_INT_WIDTH[aarch64] = "32"
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MAX_ATOMIC_WIDTH[aarch64] = "128"
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## x86_64-unknown-linux-{gnu, musl}
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DATA_LAYOUT[x86_64] = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
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TARGET_ENDIAN[x86_64] = "little"
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TARGET_POINTER_WIDTH[x86_64] = "64"
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TARGET_C_INT_WIDTH[x86_64] = "32"
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MAX_ATOMIC_WIDTH[x86_64] = "64"
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## x86_64-unknown-linux-gnux32
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DATA_LAYOUT[x86_64-x32] = "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
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TARGET_ENDIAN[x86_64-x32] = "little"
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TARGET_POINTER_WIDTH[x86_64-x32] = "32"
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TARGET_C_INT_WIDTH[x86_64-x32] = "32"
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MAX_ATOMIC_WIDTH[x86_64-x32] = "64"
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## i686-unknown-linux-{gnu, musl}
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DATA_LAYOUT[i686] = "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-i128:128-f64:32:64-f80:32-n8:16:32-S128"
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TARGET_ENDIAN[i686] = "little"
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TARGET_POINTER_WIDTH[i686] = "32"
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TARGET_C_INT_WIDTH[i686] = "32"
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MAX_ATOMIC_WIDTH[i686] = "64"
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## XXX: a bit of a hack so qemux86 builds, clone of i686-unknown-linux-{gnu, musl} above
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DATA_LAYOUT[i586] = "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-i128:128-f64:32:64-f80:32-n8:16:32-S128"
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TARGET_ENDIAN[i586] = "little"
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TARGET_POINTER_WIDTH[i586] = "32"
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TARGET_C_INT_WIDTH[i586] = "32"
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MAX_ATOMIC_WIDTH[i586] = "64"
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## mips-unknown-linux-{gnu, musl}
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DATA_LAYOUT[mips] = "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
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TARGET_ENDIAN[mips] = "big"
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TARGET_POINTER_WIDTH[mips] = "32"
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TARGET_C_INT_WIDTH[mips] = "32"
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MAX_ATOMIC_WIDTH[mips] = "32"
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## mipsel-unknown-linux-{gnu, musl}
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DATA_LAYOUT[mipsel] = "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64"
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TARGET_ENDIAN[mipsel] = "little"
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TARGET_POINTER_WIDTH[mipsel] = "32"
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TARGET_C_INT_WIDTH[mipsel] = "32"
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MAX_ATOMIC_WIDTH[mipsel] = "32"
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## mips64-unknown-linux-{gnu, musl}
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DATA_LAYOUT[mips64] = "E-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128"
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TARGET_ENDIAN[mips64] = "big"
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TARGET_POINTER_WIDTH[mips64] = "64"
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TARGET_C_INT_WIDTH[mips64] = "32"
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MAX_ATOMIC_WIDTH[mips64] = "64"
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## mips64-n32-unknown-linux-{gnu, musl}
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DATA_LAYOUT[mips64-n32] = "E-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32:64-S128"
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TARGET_ENDIAN[mips64-n32] = "big"
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TARGET_POINTER_WIDTH[mips64-n32] = "32"
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TARGET_C_INT_WIDTH[mips64-n32] = "32"
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MAX_ATOMIC_WIDTH[mips64-n32] = "64"
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## mips64el-unknown-linux-{gnu, musl}
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DATA_LAYOUT[mips64el] = "e-m:e-i8:8:32-i16:16:32-i64:64-n32:64-S128"
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TARGET_ENDIAN[mips64el] = "little"
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TARGET_POINTER_WIDTH[mips64el] = "64"
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TARGET_C_INT_WIDTH[mips64el] = "32"
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MAX_ATOMIC_WIDTH[mips64el] = "64"
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## powerpc-unknown-linux-{gnu, musl}
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DATA_LAYOUT[powerpc] = "E-m:e-p:32:32-Fn32-i64:64-n32"
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TARGET_ENDIAN[powerpc] = "big"
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TARGET_POINTER_WIDTH[powerpc] = "32"
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TARGET_C_INT_WIDTH[powerpc] = "32"
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MAX_ATOMIC_WIDTH[powerpc] = "32"
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## powerpc64-unknown-linux-{gnu, musl}
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DATA_LAYOUT[powerpc64] = "E-m:e-Fi64-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512"
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TARGET_ENDIAN[powerpc64] = "big"
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TARGET_POINTER_WIDTH[powerpc64] = "64"
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TARGET_C_INT_WIDTH[powerpc64] = "32"
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MAX_ATOMIC_WIDTH[powerpc64] = "64"
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## powerpc64le-unknown-linux-{gnu, musl}
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DATA_LAYOUT[powerpc64le] = "e-m:e-Fn32-i64:64-i128:128-n32:64-S128-v256:256:256-v512:512:512"
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TARGET_ENDIAN[powerpc64le] = "little"
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TARGET_POINTER_WIDTH[powerpc64le] = "64"
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TARGET_C_INT_WIDTH[powerpc64le] = "32"
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MAX_ATOMIC_WIDTH[powerpc64le] = "64"
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## riscv32-unknown-linux-{gnu, musl}
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DATA_LAYOUT[riscv32] = "e-m:e-p:32:32-i64:64-n32-S128"
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TARGET_ENDIAN[riscv32] = "little"
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TARGET_POINTER_WIDTH[riscv32] = "32"
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TARGET_C_INT_WIDTH[riscv32] = "32"
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MAX_ATOMIC_WIDTH[riscv32] = "32"
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## riscv64-unknown-linux-{gnu, musl}
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DATA_LAYOUT[riscv64] = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
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TARGET_ENDIAN[riscv64] = "little"
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TARGET_POINTER_WIDTH[riscv64] = "64"
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TARGET_C_INT_WIDTH[riscv64] = "32"
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MAX_ATOMIC_WIDTH[riscv64] = "64"
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## loongarch64-unknown-linux-{gnu, musl}
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DATA_LAYOUT[loongarch64] = "e-m:e-p:64:64-i64:64-i128:128-n32:64-S128"
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TARGET_ENDIAN[loongarch64] = "little"
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TARGET_POINTER_WIDTH[loongarch64] = "64"
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TARGET_C_INT_WIDTH[loongarch64] = "32"
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MAX_ATOMIC_WIDTH[loongarch64] = "64"
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FEATURES[loongarch64] = "+d"
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# Convert a normal arch (HOST_ARCH, TARGET_ARCH, BUILD_ARCH, etc) to something
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# rust's internals won't choke on.
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def arch_to_rust_target_arch(arch):
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if arch == "i586" or arch == "i686":
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return "x86"
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elif arch == "mipsel":
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return "mips"
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elif arch == "mip64sel":
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return "mips64"
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elif arch == "armv7":
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return "arm"
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elif arch == "powerpc64le":
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return "powerpc64"
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else:
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return arch
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# Convert a rust target string to a llvm-compatible triplet
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def rust_sys_to_llvm_target(sys):
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return sys
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# generates our target CPU value
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def llvm_cpu(d):
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cpu = d.getVar('PACKAGE_ARCH')
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target = d.getVar('TRANSLATED_TARGET_ARCH')
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trans = {}
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trans['corei7-64'] = "corei7"
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trans['core2-32'] = "core2"
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trans['x86-64'] = "x86-64"
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trans['i686'] = "i686"
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trans['i586'] = "i586"
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trans['mips64'] = "mips64"
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trans['mips64el'] = "mips64"
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trans['powerpc64le'] = "ppc64le"
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trans['powerpc64'] = "ppc64"
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trans['riscv64'] = "generic-rv64"
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trans['riscv32'] = "generic-rv32"
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trans['loongarch64'] = "la464"
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if target in ["mips", "mipsel", "powerpc"]:
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feat = frozenset(d.getVar('TUNE_FEATURES').split())
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if "mips32r2" in feat:
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trans['mipsel'] = "mips32r2"
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trans['mips'] = "mips32r2"
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elif "mips32" in feat:
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trans['mipsel'] = "mips32"
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trans['mips'] = "mips32"
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elif "ppc7400" in feat:
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trans['powerpc'] = "7400"
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try:
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return trans[cpu]
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except:
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return trans.get(target, "generic")
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llvm_cpu[vardepvalue] = "${@llvm_cpu(d)}"
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def rust_gen_target(d, thing, wd, arch):
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import json
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build_sys = d.getVar('BUILD_SYS')
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target_sys = d.getVar('TARGET_SYS')
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sys = d.getVar('{}_SYS'.format(thing))
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prefix = d.getVar('{}_PREFIX'.format(thing))
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rustsys = d.getVar('RUST_{}_SYS'.format(thing))
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os = d.getVar('{}_OS'.format(thing))
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abi = None
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cpu = "generic"
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features = ""
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# Need to apply the target tuning consitently, only if the triplet applies to the target
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# and not in the native case
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if sys == target_sys and sys != build_sys:
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abi = d.getVar('ABIEXTENSION')
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cpu = llvm_cpu(d)
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if bb.data.inherits_class('native', d):
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features = ','.join(llvm_features_from_cc_arch(d))
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else:
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features = llvm_features(d) or ""
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# arm and armv7 have different targets in llvm
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if arch == "arm" and target_is_armv7(d):
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arch = 'armv7'
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rust_arch = oe.rust.arch_to_rust_arch(arch)
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if abi:
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arch_abi = "{}-{}".format(rust_arch, abi)
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else:
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arch_abi = rust_arch
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features = features or d.getVarFlag('FEATURES', arch_abi) or ""
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features = features.strip()
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# build tspec
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tspec = {}
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tspec['llvm-target'] = rust_sys_to_llvm_target(rustsys)
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tspec['data-layout'] = d.getVarFlag('DATA_LAYOUT', arch_abi)
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if tspec['data-layout'] is None:
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bb.fatal("No rust target defined for %s" % arch_abi)
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tspec['max-atomic-width'] = int(d.getVarFlag('MAX_ATOMIC_WIDTH', arch_abi))
|
|
tspec['target-pointer-width'] = d.getVarFlag('TARGET_POINTER_WIDTH', arch_abi)
|
|
tspec['target-c-int-width'] = int(d.getVarFlag('TARGET_C_INT_WIDTH', arch_abi))
|
|
tspec['target-endian'] = d.getVarFlag('TARGET_ENDIAN', arch_abi)
|
|
tspec['arch'] = arch_to_rust_target_arch(rust_arch)
|
|
if "elf" in os:
|
|
tspec['os'] = "none"
|
|
else:
|
|
tspec['os'] = "linux"
|
|
if "musl" in tspec['llvm-target']:
|
|
tspec['env'] = "musl"
|
|
else:
|
|
tspec['env'] = "gnu"
|
|
if "riscv64" in tspec['llvm-target']:
|
|
tspec['llvm-abiname'] = d.getVar('TUNE_RISCV_ABI')
|
|
if "riscv32" in tspec['llvm-target']:
|
|
tspec['llvm-abiname'] = d.getVar('TUNE_RISCV_ABI')
|
|
if "loongarch64" in tspec['llvm-target']:
|
|
tspec['llvm-abiname'] = "lp64d"
|
|
if "powerpc64le" in tspec['llvm-target']:
|
|
tspec['llvm-abiname'] = "elfv2"
|
|
if "powerpc64" in tspec['llvm-target']:
|
|
tspec['llvm-abiname'] = "elfv1"
|
|
tspec['vendor'] = "unknown"
|
|
tspec['target-family'] = "unix"
|
|
tspec['linker'] = "{}{}gcc".format(d.getVar('CCACHE'), prefix)
|
|
tspec['cpu'] = cpu
|
|
if features != "":
|
|
tspec['features'] = features
|
|
fpu = d.getVar('TARGET_FPU')
|
|
if fpu in ["soft", "softfp"]:
|
|
tspec['llvm-floatabi'] = "soft"
|
|
elif fpu == "hard":
|
|
tspec['llvm-floatabi'] = "hard"
|
|
tspec['dynamic-linking'] = True
|
|
tspec['executables'] = True
|
|
tspec['linker-is-gnu'] = True
|
|
tspec['linker-flavor'] = "gcc"
|
|
tspec['has-rpath'] = True
|
|
tspec['has-thread-local'] = True
|
|
tspec['position-independent-executables'] = True
|
|
tspec['panic-strategy'] = d.getVar("RUST_PANIC_STRATEGY")
|
|
|
|
# write out the target spec json file
|
|
with open(wd + rustsys + '.json', 'w') as f:
|
|
json.dump(tspec, f, indent=4)
|
|
|
|
# These are accounted for in tmpdir path names so don't need to be in the task sig
|
|
rust_gen_target[vardepsexclude] += "ABIEXTENSION llvm_cpu"
|
|
|
|
do_rust_gen_targets[vardeps] += "DATA_LAYOUT TARGET_ENDIAN TARGET_POINTER_WIDTH TARGET_C_INT_WIDTH MAX_ATOMIC_WIDTH FEATURES"
|
|
|
|
RUST_TARGETS_DIR = "${WORKDIR}/rust-targets/"
|
|
export RUST_TARGET_PATH = "${RUST_TARGETS_DIR}"
|
|
|
|
python do_rust_gen_targets () {
|
|
wd = d.getVar('RUST_TARGETS_DIR')
|
|
# Order of BUILD, HOST, TARGET is important in case the files overwrite, most specific last
|
|
rust_gen_target(d, 'BUILD', wd, d.getVar('BUILD_ARCH'))
|
|
rust_gen_target(d, 'HOST', wd, d.getVar('HOST_ARCH'))
|
|
rust_gen_target(d, 'TARGET', wd, d.getVar('TARGET_ARCH'))
|
|
}
|
|
|
|
addtask rust_gen_targets after do_patch before do_configure
|
|
do_rust_gen_targets[dirs] += "${RUST_TARGETS_DIR}"
|
|
|
|
# For building target C dependecies use only compiler parameters defined in OE
|
|
# and ignore the CC crate defaults which conflicts with OE ones in some cases.
|
|
# https://github.com/rust-lang/cc-rs#external-configuration-via-environment-variables
|
|
# Some CC crate compiler flags are still required.
|
|
# We apply them conditionally in rust wrappers.
|
|
|
|
CRATE_CC_FLAGS:class-native = ""
|
|
CRATE_CC_FLAGS:class-nativesdk = ""
|
|
CRATE_CC_FLAGS:class-target = " -ffunction-sections -fdata-sections -fPIC"
|
|
|
|
do_compile:prepend:class-target() {
|
|
export CRATE_CC_NO_DEFAULTS=1
|
|
}
|
|
do_install:prepend:class-target() {
|
|
export CRATE_CC_NO_DEFAULTS=1
|
|
}
|