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The include is split ready to add the 32-bit RISC-V machine as soon as glibc supports 32-bit RISC-V. This is based on the work in the meta-riscv layer, thanks to Khem for starting this. (From OE-Core rev: 11b6020dff4550fc3a42e04bc1e86baf37942c62) Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
11 lines
368 B
HTML
11 lines
368 B
HTML
# RISCV Architecture definition
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DEFAULTTUNE ?= "riscv64"
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TUNE_ARCH = "${TUNE_ARCH_tune-${DEFAULTTUNE}}"
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TUNE_PKGARCH = "${TUNE_PKGARCH_tune-${DEFAULTTUNE}}"
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TUNE_CCARGS .= ""
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# QEMU usermode fails with invalid instruction error (For riscv32)
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MACHINE_FEATURES_BACKFILL_CONSIDERED_append = "${@bb.utils.contains('TUNE_FEATURES', 'riscv32', ' qemu-usermode', '', d)}"
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