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License-update: copyright years Update 0001-Makefile.pre-use-qemu-wrapper-when-gathering-profile.patch to only include tests that do not fail under qemu (following upstream change that also no longer obscures failures). Drop 0001-gh-107811-tarfile-treat-overflow-in-UID-GID-as-failu.patch (backport) 0001-python3-use-cc_basename-to-replace-CC-for-checking-c.patch (fixed upstream) 0020-configure.ac-setup.py-do-not-add-a-curses-include-pa.patch (code completely rewritten upstream) cgi_py.patch (cgi and cgitb modules removed upstream) Add fix-armv5.patch (address armv5 crashes) Modules removed in 3.13 (look for 'important removals'): https://docs.python.org/3/whatsnew/3.13.html Manifest updated accordingly. Add an explicit dependency on libatomic (needed on mips and ppc), as upstream has explicitly switched it off in cross builds. It's a no-op on other targets. Fcntl relocated to python3-core by the manifest script. (From OE-Core rev: 0b49c9aa31279ecda565cc66b63d1d61723b37b8) Signed-off-by: Alexander Kanavin <alex@linutronix.de> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
66 lines
3.7 KiB
Diff
66 lines
3.7 KiB
Diff
From 18b9079ddbc149d6b99c922630c246812e4d8ae7 Mon Sep 17 00:00:00 2001
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From: "Miss Islington (bot)"
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<31488909+miss-islington@users.noreply.github.com>
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Date: Wed, 16 Oct 2024 16:48:40 +0200
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Subject: [PATCH] [3.13] gh-125444: Fix illegal instruction for older Arm
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architectures (GH-125574) (GH-125595)
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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On Arm v5 it is not possible to get the thread ID via c13 register
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hence the illegal instruction. The c13 register started to provide
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thread ID since Arm v6K architecture variant. Other variants of
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Arm v6 (T2, Z and base) don’t provide the thread ID via c13.
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For the sake of simplicity we group v5 and v6 together and
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consider that instructions for Arm v7 only.
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(cherry picked from commit feda9aa73ab95d17a291db22c416146f8e70edeb)
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Co-authored-by: Diego Russo <diego.russo@arm.com>
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Upstream-Status: Backport [https://github.com/python/cpython/commit/18b9079ddbc149d6b99c922630c246812e4d8ae7]
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Signed-off-by: Alexander Kanavin <alex@linutronix.de>
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---
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Include/internal/mimalloc/mimalloc/prim.h | 4 ++--
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Include/object.h | 2 +-
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.../2024-10-16-12-12-39.gh-issue-125444.9tG2X6.rst | 1 +
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3 files changed, 4 insertions(+), 3 deletions(-)
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create mode 100644 Misc/NEWS.d/next/Core_and_Builtins/2024-10-16-12-12-39.gh-issue-125444.9tG2X6.rst
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diff --git a/Include/internal/mimalloc/mimalloc/prim.h b/Include/internal/mimalloc/mimalloc/prim.h
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index 8a60d528458e6c..322ab29e6b41c2 100644
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--- a/Include/internal/mimalloc/mimalloc/prim.h
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+++ b/Include/internal/mimalloc/mimalloc/prim.h
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@@ -151,9 +151,9 @@ static inline mi_threadid_t _mi_prim_thread_id(void) mi_attr_noexcept {
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// If you test on another platform and it works please send a PR :-)
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// see also https://akkadia.org/drepper/tls.pdf for more info on the TLS register.
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#elif defined(__GNUC__) && ( \
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- (defined(__GLIBC__) && (defined(__x86_64__) || defined(__i386__) || defined(__arm__) || defined(__aarch64__))) \
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+ (defined(__GLIBC__) && (defined(__x86_64__) || defined(__i386__) || (defined(__arm__) && __ARM_ARCH >= 7) || defined(__aarch64__))) \
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|| (defined(__APPLE__) && (defined(__x86_64__) || defined(__aarch64__))) \
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- || (defined(__BIONIC__) && (defined(__x86_64__) || defined(__i386__) || defined(__arm__) || defined(__aarch64__))) \
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+ || (defined(__BIONIC__) && (defined(__x86_64__) || defined(__i386__) || (defined(__arm__) && __ARM_ARCH >= 7) || defined(__aarch64__))) \
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|| (defined(__FreeBSD__) && (defined(__x86_64__) || defined(__i386__) || defined(__aarch64__))) \
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|| (defined(__OpenBSD__) && (defined(__x86_64__) || defined(__i386__) || defined(__aarch64__))) \
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)
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diff --git a/Include/object.h b/Include/object.h
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index 78aa7ad0f459ff..b53f9acfebdb0c 100644
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--- a/Include/object.h
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+++ b/Include/object.h
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@@ -259,7 +259,7 @@ _Py_ThreadId(void)
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__asm__("movq %%gs:0, %0" : "=r" (tid)); // x86_64 macOSX uses GS
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#elif defined(__x86_64__)
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__asm__("movq %%fs:0, %0" : "=r" (tid)); // x86_64 Linux, BSD uses FS
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-#elif defined(__arm__)
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+#elif defined(__arm__) && __ARM_ARCH >= 7
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__asm__ ("mrc p15, 0, %0, c13, c0, 3\nbic %0, %0, #3" : "=r" (tid));
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#elif defined(__aarch64__) && defined(__APPLE__)
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__asm__ ("mrs %0, tpidrro_el0" : "=r" (tid));
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diff --git a/Misc/NEWS.d/next/Core_and_Builtins/2024-10-16-12-12-39.gh-issue-125444.9tG2X6.rst b/Misc/NEWS.d/next/Core_and_Builtins/2024-10-16-12-12-39.gh-issue-125444.9tG2X6.rst
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new file mode 100644
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index 00000000000000..13c1e745edf8d5
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--- /dev/null
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+++ b/Misc/NEWS.d/next/Core_and_Builtins/2024-10-16-12-12-39.gh-issue-125444.9tG2X6.rst
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@@ -0,0 +1 @@
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+Fix illegal instruction for older Arm architectures. Patch by Diego Russo, testing by Ross Burton.
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