qemu: upgrade to 2.3.0

Qemu-Arm-versatilepb-Add-memory-size-checking.patch
brought up to date;
37ed3bf1ee07bb1a26adca0df8718f601f231c0b.patch removed,
integrated upstream;
glx enable config option changed to opengl enable,
update accordingly.

(From OE-Core rev: b88e3808533a7280c85e570a1359efcba8dcc4bd)

Signed-off-by: Cristian Iorga <cristian.iorga@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
This commit is contained in:
Cristian Iorga
2015-05-06 18:21:46 +03:00
committed by Richard Purdie
parent fc94b83be4
commit 19d5755899
4 changed files with 16 additions and 74 deletions

View File

@@ -18,27 +18,29 @@ Signed-off-by: Robert Yang <liezhi.yang@windriver.com>
Update it when upgrade qemu to 2.2.0
Signed-off-by: Kai Kang <kai.kang@windriver.com>
Signed-off-by: Cristian Iorga <cristian.iorga@intel.com>
---
hw/arm/versatilepb.c | 6 ++++++
1 file changed, 6 insertions(+)
hw/arm/versatilepb.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c
index b48d84c..ad2cd5a 100644
index 6c69f4e..9278d90 100644
--- a/hw/arm/versatilepb.c
+++ b/hw/arm/versatilepb.c
@@ -198,6 +198,12 @@ static void versatile_init(MachineState *machine, int board_id)
fprintf(stderr, "Unable to find CPU definition\n");
@@ -204,6 +204,13 @@ static void versatile_init(MachineState *machine, int board_id)
exit(1);
}
+ if (ram_size > (256 << 20)) {
+ if (machine->ram_size > (256 << 20)) {
+ fprintf(stderr,
+ "qemu: Too much memory for this machine: %d MB, maximum 256 MB\n",
+ ((unsigned int)ram_size / (1 << 20)));
+ exit(1);
+ }
memory_region_init_ram(ram, NULL, "versatile.ram", machine->ram_size,
&error_abort);
vmstate_register_ram_global(ram);
--
1.7.10.4
+
cpuobj = object_new(object_class_get_name(cpu_oc));
/* By default ARM1176 CPUs have EL3 enabled. This board does not
--
2.1.0

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@@ -115,7 +115,7 @@ PACKAGECONFIG[ssh2] = "--enable-libssh2,--disable-libssh2,libssh2,"
PACKAGECONFIG[libusb] = "--enable-libusb,--disable-libusb,libusb1"
PACKAGECONFIG[fdt] = "--enable-fdt,--disable-fdt,dtc"
PACKAGECONFIG[alsa] = ",,alsa-lib"
PACKAGECONFIG[glx] = "--enable-glx,--disable-glx,mesa"
PACKAGECONFIG[glx] = "--enable-opengl,--disable-opengl,mesa"
PACKAGECONFIG[lzo] = "--enable-lzo,--disable-lzo,lzo"
PACKAGECONFIG[numa] = "--enable-numa,--disable-numa,numactl"

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@@ -1,59 +0,0 @@
Without this patch, x86_64 images would show invalid EDSCA key errors
with sshd from openssh (but not dropbear) during init.
This would cause problems with operation with some distros where EDSCA
keys were mandatory. The issue was present in qemu 2.2.1 and not in
2.3.0-rc0, bisected to this commit which was then backported.
From 37ed3bf1ee07bb1a26adca0df8718f601f231c0b Mon Sep 17 00:00:00 2001
From: Richard Henderson <rth@twiddle.net>
Date: Fri, 20 Feb 2015 11:13:50 -0800
Subject: [PATCH] tcg: Complete handling of ALWAYS and NEVER
Missing from movcond
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/tcg-op.c | 22 +++++++++++++++++-----
1 files changed, 17 insertions(+), 5 deletions(-)
Upstream-Status: Backport
RP 2015/3/24
Index: qemu-2.2.0/tcg/tcg-op.h
===================================================================
--- qemu-2.2.0.orig/tcg/tcg-op.h
+++ qemu-2.2.0/tcg/tcg-op.h
@@ -2186,7 +2186,11 @@ static inline void tcg_gen_movcond_i32(T
TCGv_i32 c1, TCGv_i32 c2,
TCGv_i32 v1, TCGv_i32 v2)
{
- if (TCG_TARGET_HAS_movcond_i32) {
+ if (cond == TCG_COND_ALWAYS) {
+ tcg_gen_mov_i32(ret, v1);
+ } else if (cond == TCG_COND_NEVER) {
+ tcg_gen_mov_i32(ret, v2);
+ } else if (TCG_TARGET_HAS_movcond_i32) {
tcg_gen_op6i_i32(INDEX_op_movcond_i32, ret, c1, c2, v1, v2, cond);
} else {
TCGv_i32 t0 = tcg_temp_new_i32();
@@ -2205,6 +2209,11 @@ static inline void tcg_gen_movcond_i64(T
TCGv_i64 c1, TCGv_i64 c2,
TCGv_i64 v1, TCGv_i64 v2)
{
+ if (cond == TCG_COND_ALWAYS) {
+ tcg_gen_mov_i64(ret, v1);
+ } else if (cond == TCG_COND_NEVER) {
+ tcg_gen_mov_i64(ret, v2);
+ } else {
#if TCG_TARGET_REG_BITS == 32
TCGv_i32 t0 = tcg_temp_new_i32();
TCGv_i32 t1 = tcg_temp_new_i32();
@@ -2246,6 +2255,7 @@ static inline void tcg_gen_movcond_i64(T
tcg_temp_free_i64(t1);
}
#endif
+ }
}
static inline void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,

View File

@@ -6,11 +6,10 @@ LIC_FILES_CHKSUM = "file://COPYING;md5=441c28d2cf86e15a37fa47e15a72fbac \
SRC_URI += "file://configure-fix-Darwin-target-detection.patch \
file://qemu-enlarge-env-entry-size.patch \
file://Qemu-Arm-versatilepb-Add-memory-size-checking.patch \
file://37ed3bf1ee07bb1a26adca0df8718f601f231c0b.patch \
"
SRC_URI_prepend = "http://wiki.qemu-project.org/download/${BP}.tar.bz2"
SRC_URI[md5sum] = "f7a5e2da22d057eb838a91da7aff43c8"
SRC_URI[sha256sum] = "b68c9b6c7c694f5489b5a6bffe993cd976ffbb78e7d178eb3bc016caf460039c"
SRC_URI[md5sum] = "2fab3ea4460de9b57192e5b8b311f221"
SRC_URI[sha256sum] = "b6bab7f763d5be73e7cb5ee7d4c8365b7a8df2972c52fa5ded18893bd8281588"
COMPATIBLE_HOST_class-target_mips64 = "null"