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gcc: add arm-v9 support
Backport some patches from GCC 12 to support arm-v9. (From OE-Core rev: 450639bf4b46b963480b2ab4efe72e443d0524b3) Signed-off-by: Ruiqiang Hao <Ruiqiang.Hao@windriver.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
This commit is contained in:
Ruiqiang Hao
committed by
Richard Purdie
Richard Purdie
parent
5385ece02d
commit
1e779dbf2a
@@ -65,7 +65,12 @@ SRC_URI = "\
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file://0003-CVE-2021-42574.patch \
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file://0004-CVE-2021-42574.patch \
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file://0001-CVE-2021-46195.patch \
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file://0001-aarch64-Update-Neoverse-N2-core-defini.patch \
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file://0002-aarch64-add-armv9-a-to-march.patch \
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file://0003-aarch64-Enable-FP16-feature-by-default-for-Armv9.patch \
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file://0004-arm-add-armv9-a-architecture-to-march.patch \
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"
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SRC_URI[sha256sum] = "b47cf2818691f5b1e21df2bb38c795fac2cfbd640ede2d0a5e1c89e338a3ac39"
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S = "${TMPDIR}/work-shared/gcc-${PV}-${PR}/gcc-${PV}"
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@@ -0,0 +1,42 @@
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From 9f37d31324f89d0b7b2abac988a976d121ae29c6 Mon Sep 17 00:00:00 2001
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From: Andre Vieira <andre.simoesdiasvieira@arm.com>
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Date: Thu, 8 Sep 2022 06:02:18 +0000
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Subject: [PATCH 1/4] aarch64: Update Neoverse N2 core definition
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commit 9f37d31324f89d0b7b2abac988a976d121ae29c6 from upstream.
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gcc/ChangeLog:
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* config/aarch64/aarch64-cores.def: Update Neoverse N2 core entry.
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Upstream-Status: Backport
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Signed-off-by: Ruiqiang Hao <Ruiqiang.Hao@windriver.com>
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---
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gcc/config/aarch64/aarch64-cores.def | 6 +++---
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1 file changed, 3 insertions(+), 3 deletions(-)
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diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
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index 4643e0e27..3478e567a 100644
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--- a/gcc/config/aarch64/aarch64-cores.def
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+++ b/gcc/config/aarch64/aarch64-cores.def
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@@ -145,9 +145,6 @@ AARCH64_CORE("neoverse-512tvb", neoverse512tvb, cortexa57, 8_4A, AARCH64_FL_FOR
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/* Qualcomm ('Q') cores. */
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AARCH64_CORE("saphira", saphira, saphira, 8_4A, AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_CRYPTO | AARCH64_FL_RCPC, saphira, 0x51, 0xC01, -1)
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-/* Armv8.5-A Architecture Processors. */
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-AARCH64_CORE("neoverse-n2", neoversen2, cortexa57, 8_5A, AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_F16 | AARCH64_FL_SVE | AARCH64_FL_SVE2 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_RNG | AARCH64_FL_MEMTAG, neoversen2, 0x41, 0xd49, -1)
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-
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/* ARMv8-A big.LITTLE implementations. */
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AARCH64_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, 0x41, AARCH64_BIG_LITTLE (0xd07, 0xd03), -1)
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@@ -163,4 +160,7 @@ AARCH64_CORE("cortex-a76.cortex-a55", cortexa76cortexa55, cortexa53, 8_2A, AAR
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/* Armv8-R Architecture Processors. */
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AARCH64_CORE("cortex-r82", cortexr82, cortexa53, 8R, AARCH64_FL_FOR_ARCH8_R, cortexa53, 0x41, 0xd15, -1)
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+/* Armv9-A Architecture Processors. */
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+AARCH64_CORE("neoverse-n2", neoversen2, cortexa57, 9A, AARCH64_FL_FOR_ARCH9 | AARCH64_FL_I8MM | AARCH64_FL_BF16 | AARCH64_FL_SVE2_BITPERM | AARCH64_FL_RNG | AARCH64_FL_MEMTAG | AARCH64_FL_PROFILE, neoversen2, 0x41, 0xd49, -1)
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+
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#undef AARCH64_CORE
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--
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2.32.0
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@@ -0,0 +1,89 @@
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From d3cf45d15b2fabc767b2d10a0c6bb9fb845e4f99 Mon Sep 17 00:00:00 2001
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From: Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
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Date: Fri, 1 Oct 2021 10:06:45 +0100
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Subject: [PATCH 2/4] aarch64: add armv9-a to -march
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commit f0688d42c9b74a6999548ff2e79ae440b049b87f from upstream
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gcc/ChangeLog:
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* config/aarch64/aarch64-arches.def (AARCH64_ARCH): Added
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armv9-a.
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* config/aarch64/aarch64.h (AARCH64_FL_V9): New.
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(AARCH64_FL_FOR_ARCH9): New flags for Armv9-A.
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(AARCH64_ISA_V9): New ISA flag.
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* doc/invoke.texi: Update docs.
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Upstream-Status: Backport
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Signed-off-by: Ruiqiang Hao <Ruiqiang.Hao@windriver.com>
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---
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gcc/config/aarch64/aarch64-arches.def | 1 +
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gcc/config/aarch64/aarch64.h | 5 +++++
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gcc/doc/invoke.texi | 3 +++
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3 files changed, 9 insertions(+)
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diff --git a/gcc/config/aarch64/aarch64-arches.def b/gcc/config/aarch64/aarch64-arches.def
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index b7497277b..c47ca622c 100644
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--- a/gcc/config/aarch64/aarch64-arches.def
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+++ b/gcc/config/aarch64/aarch64-arches.def
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@@ -38,5 +38,6 @@ AARCH64_ARCH("armv8.4-a", generic, 8_4A, 8, AARCH64_FL_FOR_ARCH8_4)
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AARCH64_ARCH("armv8.5-a", generic, 8_5A, 8, AARCH64_FL_FOR_ARCH8_5)
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AARCH64_ARCH("armv8.6-a", generic, 8_6A, 8, AARCH64_FL_FOR_ARCH8_6)
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AARCH64_ARCH("armv8-r", generic, 8R , 8, AARCH64_FL_FOR_ARCH8_R)
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+AARCH64_ARCH("armv9-a", generic, 9A , 9, AARCH64_FL_FOR_ARCH9)
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#undef AARCH64_ARCH
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diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
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index bfffbcd6a..b914bfb5c 100644
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--- a/gcc/config/aarch64/aarch64.h
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+++ b/gcc/config/aarch64/aarch64.h
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@@ -230,6 +230,8 @@ extern unsigned aarch64_architecture_version;
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/* Pointer Authentication (PAUTH) extension. */
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#define AARCH64_FL_PAUTH (1ULL << 40)
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+/* Armv9.0-A. */
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+#define AARCH64_FL_V9 (1ULL << 41) /* Armv9.0-A Architecture. */
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/* Has FP and SIMD. */
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#define AARCH64_FL_FPSIMD (AARCH64_FL_FP | AARCH64_FL_SIMD)
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@@ -257,6 +259,8 @@ extern unsigned aarch64_architecture_version;
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| AARCH64_FL_I8MM | AARCH64_FL_BF16)
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#define AARCH64_FL_FOR_ARCH8_R \
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(AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_V8_R)
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+#define AARCH64_FL_FOR_ARCH9 \
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+ (AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_SVE | AARCH64_FL_SVE2 | AARCH64_FL_V9)
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/* Macros to test ISA flags. */
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@@ -295,6 +299,7 @@ extern unsigned aarch64_architecture_version;
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#define AARCH64_ISA_SB (aarch64_isa_flags & AARCH64_FL_SB)
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#define AARCH64_ISA_V8_R (aarch64_isa_flags & AARCH64_FL_V8_R)
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#define AARCH64_ISA_PAUTH (aarch64_isa_flags & AARCH64_FL_PAUTH)
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+#define AARCH64_ISA_V9 (aarch64_isa_flags & AARCH64_FL_V9)
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/* Crypto is an optional extension to AdvSIMD. */
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#define TARGET_CRYPTO (TARGET_SIMD && AARCH64_ISA_CRYPTO)
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diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
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index c47cfd472..7184a62d0 100644
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--- a/gcc/doc/invoke.texi
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+++ b/gcc/doc/invoke.texi
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@@ -18270,6 +18270,8 @@ and the features that they enable by default:
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@item @samp{armv8.4-a} @tab Armv8.4-A @tab @samp{armv8.3-a}, @samp{+flagm}, @samp{+fp16fml}, @samp{+dotprod}
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@item @samp{armv8.5-a} @tab Armv8.5-A @tab @samp{armv8.4-a}, @samp{+sb}, @samp{+ssbs}, @samp{+predres}
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@item @samp{armv8.6-a} @tab Armv8.6-A @tab @samp{armv8.5-a}, @samp{+bf16}, @samp{+i8mm}
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+@item @samp{armv8.7-a} @tab Armv8.7-A @tab @samp{armv8.6-a}, @samp{+ls64}
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+@item @samp{armv9-a} @tab Armv9-A @tab @samp{armv8.5-a}, @samp{+sve}, @samp{+sve2}
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@item @samp{armv8-r} @tab Armv8-R @tab @samp{armv8-r}
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@end multitable
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@@ -19692,6 +19694,7 @@ Permissible names are:
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@samp{armv8.4-a},
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@samp{armv8.5-a},
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@samp{armv8.6-a},
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+@samp{armv9-a},
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@samp{armv7-r},
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@samp{armv8-r},
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@samp{armv6-m}, @samp{armv6s-m},
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--
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2.32.0
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@@ -0,0 +1,38 @@
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From 49bfa1927813ae898dfa4e0d2bbde033c353e3dc Mon Sep 17 00:00:00 2001
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From: Andre Vieira <andre.simoesdiasvieira@arm.com>
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Date: Tue, 22 Mar 2022 11:44:06 +0000
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Subject: [PATCH 3/4] aarch64: Enable FP16 feature by default for Armv9
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commit 0bae246acc758d4b11dd575b05207fd69169109b from upstream
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This patch adds the feature bit for FP16 to the feature set for Armv9 since
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Armv9 requires SVE to be implemented and SVE requires FP16 to be implemented.
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2022-03-22 Andre Vieira <andre.simoesdiasvieira@arm.com>
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* config/aarch64/aarch64.h (AARCH64_FL_FOR_ARCH9): Add FP16 feature
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bit.
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Upstream-Status: Backport
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Signed-off-by: Ruiqiang Hao <Ruiqiang.Hao@windriver.com>
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---
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gcc/config/aarch64/aarch64.h | 3 ++-
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1 file changed, 2 insertions(+), 1 deletion(-)
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diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
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index b914bfb5c..55b60d540 100644
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--- a/gcc/config/aarch64/aarch64.h
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+++ b/gcc/config/aarch64/aarch64.h
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@@ -260,7 +260,8 @@ extern unsigned aarch64_architecture_version;
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#define AARCH64_FL_FOR_ARCH8_R \
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(AARCH64_FL_FOR_ARCH8_4 | AARCH64_FL_V8_R)
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#define AARCH64_FL_FOR_ARCH9 \
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- (AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_SVE | AARCH64_FL_SVE2 | AARCH64_FL_V9)
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+ (AARCH64_FL_FOR_ARCH8_5 | AARCH64_FL_SVE | AARCH64_FL_SVE2 | AARCH64_FL_V9 \
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+ | AARCH64_FL_F16)
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/* Macros to test ISA flags. */
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--
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2.32.0
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@@ -0,0 +1,294 @@
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From e66a37acae62236611f951e706e9a2bfbd753f39 Mon Sep 17 00:00:00 2001
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From: Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
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Date: Tue, 9 Nov 2021 09:40:05 +0000
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Subject: [PATCH 4/4] arm: add armv9-a architecture to -march
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commit 32ba7860ccaddd5219e6dae94a3d0653e124c9dd from upstream
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In this patch:
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+ Add `armv9-a` to -march.
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+ Update multilib with armv9-a and armv9-a+simd.
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gcc/ChangeLog:
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* config/arm/arm-cpus.in (armv9): New define.
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(ARMv9a): New group.
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(armv9-a): New arch definition.
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* config/arm/arm-tables.opt: Regenerate.
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* config/arm/arm.h (BASE_ARCH_9A): New arch enum value.
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* config/arm/t-aprofile: Added armv9-a and armv9+simd.
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* config/arm/t-arm-elf: Added arm9-a, v9_fps and all_v9_archs
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to MULTILIB_MATCHES.
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* config/arm/t-multilib: Added v9_a_nosimd_variants and
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v9_a_simd_variants to MULTILIB_MATCHES.
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* doc/invoke.texi: Update docs.
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gcc/testsuite/ChangeLog:
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* gcc.target/arm/multilib.exp: Update test with armv9-a entries.
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* lib/target-supports.exp (v9a): Add new armflag.
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(__ARM_ARCH_9A__): Add new armdef.
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Upstream-Status: Backport
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Signed-off-by: Ruiqiang Hao <Ruiqiang.Hao@windriver.com>
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---
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gcc/config/arm/arm-cpus.in | 19 +++++++++++++++++
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gcc/config/arm/arm-tables.opt | 7 +++++--
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gcc/config/arm/arm.h | 3 ++-
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gcc/config/arm/t-aprofile | 25 +++++++++++++++++++----
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gcc/config/arm/t-arm-elf | 9 ++++++++
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gcc/config/arm/t-multilib | 12 +++++++++++
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gcc/doc/invoke.texi | 1 +
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gcc/testsuite/gcc.target/arm/multilib.exp | 8 ++++++++
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gcc/testsuite/lib/target-supports.exp | 3 ++-
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9 files changed, 79 insertions(+), 8 deletions(-)
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diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
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index bcc9ebe9f..58d83829c 100644
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--- a/gcc/config/arm/arm-cpus.in
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+++ b/gcc/config/arm/arm-cpus.in
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@@ -132,6 +132,9 @@ define feature cmse
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# Architecture rel 8.1-M.
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define feature armv8_1m_main
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+# Architecture rel 9.0.
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+define feature armv9
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+
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# Floating point and Neon extensions.
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# VFPv1 is not supported in GCC.
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@@ -293,6 +296,7 @@ define fgroup ARMv8m_base ARMv6m armv8 cmse tdiv
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define fgroup ARMv8m_main ARMv7m armv8 cmse
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define fgroup ARMv8r ARMv8a
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define fgroup ARMv8_1m_main ARMv8m_main armv8_1m_main
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+define fgroup ARMv9a ARMv8_5a armv9
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# Useful combinations.
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define fgroup VFPv2 vfpv2
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@@ -751,6 +755,21 @@ begin arch armv8.1-m.main
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option cdecp7 add cdecp7
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end arch armv8.1-m.main
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+begin arch armv9-a
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+ tune for cortex-a53
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+ tune flags CO_PROC
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+ base 9A
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+ profile A
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+ isa ARMv9a
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+ option simd add FP_ARMv8 DOTPROD
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+ option fp16 add fp16 fp16fml FP_ARMv8 DOTPROD
|
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+ option crypto add FP_ARMv8 CRYPTO DOTPROD
|
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+ option nocrypto remove ALL_CRYPTO
|
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+ option nofp remove ALL_FP
|
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+ option i8mm add i8mm FP_ARMv8 DOTPROD
|
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+ option bf16 add bf16 FP_ARMv8 DOTPROD
|
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+end arch armv9-a
|
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+
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begin arch iwmmxt
|
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tune for iwmmxt
|
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tune flags LDSCHED STRONG XSCALE
|
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diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
|
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index 5692d4fb7..ae3dd9414 100644
|
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--- a/gcc/config/arm/arm-tables.opt
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+++ b/gcc/config/arm/arm-tables.opt
|
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@@ -380,10 +380,13 @@ EnumValue
|
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Enum(arm_arch) String(armv8.1-m.main) Value(30)
|
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|
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EnumValue
|
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-Enum(arm_arch) String(iwmmxt) Value(31)
|
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+Enum(arm_arch) String(armv9-a) Value(31)
|
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|
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EnumValue
|
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-Enum(arm_arch) String(iwmmxt2) Value(32)
|
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+Enum(arm_arch) String(iwmmxt) Value(32)
|
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+
|
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+EnumValue
|
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+Enum(arm_arch) String(iwmmxt2) Value(33)
|
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|
||||
Enum
|
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Name(arm_fpu) Type(enum fpu_type)
|
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diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
|
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index 47c13a9e5..088c7725c 100644
|
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--- a/gcc/config/arm/arm.h
|
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+++ b/gcc/config/arm/arm.h
|
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@@ -456,7 +456,8 @@ enum base_architecture
|
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BASE_ARCH_8A = 8,
|
||||
BASE_ARCH_8M_BASE = 8,
|
||||
BASE_ARCH_8M_MAIN = 8,
|
||||
- BASE_ARCH_8R = 8
|
||||
+ BASE_ARCH_8R = 8,
|
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+ BASE_ARCH_9A = 9
|
||||
};
|
||||
|
||||
/* The major revision number of the ARM Architecture implemented by the target. */
|
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diff --git a/gcc/config/arm/t-aprofile b/gcc/config/arm/t-aprofile
|
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index 8574ac3e2..68e2251c7 100644
|
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--- a/gcc/config/arm/t-aprofile
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+++ b/gcc/config/arm/t-aprofile
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@@ -26,8 +26,8 @@
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# Arch and FPU variants to build libraries with
|
||||
|
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-MULTI_ARCH_OPTS_A = march=armv7-a/march=armv7-a+fp/march=armv7-a+simd/march=armv7ve+simd/march=armv8-a/march=armv8-a+simd
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-MULTI_ARCH_DIRS_A = v7-a v7-a+fp v7-a+simd v7ve+simd v8-a v8-a+simd
|
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+MULTI_ARCH_OPTS_A = march=armv7-a/march=armv7-a+fp/march=armv7-a+simd/march=armv7ve+simd/march=armv8-a/march=armv8-a+simd/march=armv9-a/march=armv9-a+simd
|
||||
+MULTI_ARCH_DIRS_A = v7-a v7-a+fp v7-a+simd v7ve+simd v8-a v8-a+simd v9-a v9-a+simd
|
||||
|
||||
# ARMv7-A - build nofp, fp-d16 and SIMD variants
|
||||
|
||||
@@ -46,6 +46,11 @@ MULTILIB_REQUIRED += mthumb/march=armv8-a/mfloat-abi=soft
|
||||
MULTILIB_REQUIRED += mthumb/march=armv8-a+simd/mfloat-abi=hard
|
||||
MULTILIB_REQUIRED += mthumb/march=armv8-a+simd/mfloat-abi=softfp
|
||||
|
||||
+# Armv9-A - build nofp and SIMD variants.
|
||||
+MULTILIB_REQUIRED += mthumb/march=armv9-a/mfloat-abi=soft
|
||||
+MULTILIB_REQUIRED += mthumb/march=armv9-a+simd/mfloat-abi=hard
|
||||
+MULTILIB_REQUIRED += mthumb/march=armv9-a+simd/mfloat-abi=softfp
|
||||
+
|
||||
# Matches
|
||||
|
||||
# Arch Matches
|
||||
@@ -129,17 +134,29 @@ MULTILIB_MATCHES += march?armv8-a=march?armv8.6-a
|
||||
MULTILIB_MATCHES += $(foreach ARCH, $(v8_6_a_simd_variants), \
|
||||
march?armv8-a+simd=march?armv8.6-a$(ARCH))
|
||||
|
||||
+# Armv9 without SIMD: map down to base architecture
|
||||
+MULTILIB_MATCHES += $(foreach ARCH, $(v9_a_nosimd_variants), \
|
||||
+ march?armv9-a=march?armv9-a$(ARCH))
|
||||
+
|
||||
+# Armv9 with SIMD: map down to base arch + simd
|
||||
+MULTILIB_MATCHES += march?armv9-a+simd=march?armv9-a+crc+simd \
|
||||
+ $(foreach ARCH, $(filter-out +simd, $(v9_a_simd_variants)), \
|
||||
+ march?armv9-a+simd=march?armv9-a$(ARCH) \
|
||||
+ march?armv9-a+simd=march?armv9-a+crc$(ARCH))
|
||||
+
|
||||
# Use Thumb libraries for everything.
|
||||
|
||||
MULTILIB_REUSE += mthumb/march.armv7-a/mfloat-abi.soft=marm/march.armv7-a/mfloat-abi.soft
|
||||
|
||||
MULTILIB_REUSE += mthumb/march.armv8-a/mfloat-abi.soft=marm/march.armv8-a/mfloat-abi.soft
|
||||
|
||||
+MULTILIB_REUSE += mthumb/march.armv9-a/mfloat-abi.soft=marm/march.armv9-a/mfloat-abi.soft
|
||||
+
|
||||
MULTILIB_REUSE += $(foreach ABI, hard softfp, \
|
||||
- $(foreach ARCH, armv7-a+fp armv7-a+simd armv7ve+simd armv8-a+simd, \
|
||||
+ $(foreach ARCH, armv7-a+fp armv7-a+simd armv7ve+simd armv8-a+simd armv9-a+simd, \
|
||||
mthumb/march.$(ARCH)/mfloat-abi.$(ABI)=marm/march.$(ARCH)/mfloat-abi.$(ABI)))
|
||||
|
||||
# Softfp but no FP, use the soft-float libraries.
|
||||
MULTILIB_REUSE += $(foreach MODE, arm thumb, \
|
||||
- $(foreach ARCH, armv7-a armv8-a, \
|
||||
+ $(foreach ARCH, armv7-a armv8-a armv9-a, \
|
||||
mthumb/march.$(ARCH)/mfloat-abi.soft=m$(MODE)/march.$(ARCH)/mfloat-abi.softfp))
|
||||
diff --git a/gcc/config/arm/t-arm-elf b/gcc/config/arm/t-arm-elf
|
||||
index d68def308..b3a900e8c 100644
|
||||
--- a/gcc/config/arm/t-arm-elf
|
||||
+++ b/gcc/config/arm/t-arm-elf
|
||||
@@ -38,6 +38,8 @@ v7ve_fps := vfpv3-d16 vfpv3 vfpv3-d16-fp16 vfpv3-fp16 vfpv4 neon \
|
||||
# it seems to work ok.
|
||||
v8_fps := simd fp16 crypto fp16+crypto dotprod fp16fml
|
||||
|
||||
+v9_fps := simd fp16 crypto fp16+crypto dotprod fp16fml
|
||||
+
|
||||
# We don't do anything special with these. Pre-v4t probably doesn't work.
|
||||
all_early_nofp := armv4 armv4t armv5t
|
||||
|
||||
@@ -49,6 +51,8 @@ all_v7_a_r := armv7-a armv7ve armv7-r
|
||||
all_v8_archs := armv8-a armv8-a+crc armv8.1-a armv8.2-a armv8.3-a armv8.4-a \
|
||||
armv8.5-a armv8.6-a
|
||||
|
||||
+all_v9_archs := armv9-a
|
||||
+
|
||||
# No floating point variants, require thumb1 softfp
|
||||
all_nofp_t := armv6-m armv6s-m armv8-m.base
|
||||
|
||||
@@ -110,6 +114,11 @@ MULTILIB_MATCHES += $(foreach ARCH, $(all_v8_archs), \
|
||||
$(foreach FPARCH, $(v8_fps), \
|
||||
march?armv7+fp=march?$(ARCH)+$(FPARCH)))
|
||||
|
||||
+MULTILIB_MATCHES += $(foreach ARCH, $(all_v9_archs), \
|
||||
+ march?armv7+fp=march?$(ARCH) \
|
||||
+ $(foreach FPARCH, $(v9_fps), \
|
||||
+ march?armv7+fp=march?$(ARCH)+$(FPARCH)))
|
||||
+
|
||||
MULTILIB_MATCHES += $(foreach ARCH, armv7e-m armv8-m.mainline, \
|
||||
march?armv7+fp=march?$(ARCH)+fp.dp)
|
||||
|
||||
diff --git a/gcc/config/arm/t-multilib b/gcc/config/arm/t-multilib
|
||||
index ddc5033bf..d789b86ee 100644
|
||||
--- a/gcc/config/arm/t-multilib
|
||||
+++ b/gcc/config/arm/t-multilib
|
||||
@@ -78,6 +78,8 @@ v8_4_a_simd_variants := $(call all_feat_combs, simd fp16 crypto i8mm bf16)
|
||||
v8_5_a_simd_variants := $(call all_feat_combs, simd fp16 crypto i8mm bf16)
|
||||
v8_6_a_simd_variants := $(call all_feat_combs, simd fp16 crypto i8mm bf16)
|
||||
v8_r_nosimd_variants := +crc
|
||||
+v9_a_nosimd_variants := +crc
|
||||
+v9_a_simd_variants := $(call all_feat_combs, simd fp16 crypto i8mm bf16)
|
||||
|
||||
ifneq (,$(HAS_APROFILE))
|
||||
include $(srcdir)/config/arm/t-aprofile
|
||||
@@ -202,6 +204,16 @@ MULTILIB_MATCHES += march?armv7=march?armv8.6-a
|
||||
MULTILIB_MATCHES += $(foreach ARCH, $(v8_6_a_simd_variants), \
|
||||
march?armv7+fp=march?armv8.6-a$(ARCH))
|
||||
|
||||
+# Armv9
|
||||
+MULTILIB_MATCHES += march?armv7=march?armv9-a
|
||||
+MULTILIB_MATCHES += $(foreach ARCH, $(v9_a_nosimd_variants), \
|
||||
+ march?armv7=march?armv9-a$(ARCH))
|
||||
+
|
||||
+# Armv9 with SIMD
|
||||
+MULTILIB_MATCHES += march?armv7+fp=march?armv9-a+crc+simd \
|
||||
+ $(foreach ARCH, $(v9_a_simd_variants), \
|
||||
+ march?armv7+fp=march?armv9-a$(ARCH) \
|
||||
+ march?armv7+fp=march?armv9-a+crc$(ARCH))
|
||||
endif # Not APROFILE.
|
||||
|
||||
# Use Thumb libraries for everything.
|
||||
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
|
||||
index 7184a62d0..9a712c0d6 100644
|
||||
--- a/gcc/doc/invoke.texi
|
||||
+++ b/gcc/doc/invoke.texi
|
||||
@@ -19701,6 +19701,7 @@ Permissible names are:
|
||||
@samp{armv7-m}, @samp{armv7e-m},
|
||||
@samp{armv8-m.base}, @samp{armv8-m.main},
|
||||
@samp{armv8.1-m.main},
|
||||
+@samp{armv9-a},
|
||||
@samp{iwmmxt} and @samp{iwmmxt2}.
|
||||
|
||||
Additionally, the following architectures, which lack support for the
|
||||
diff --git a/gcc/testsuite/gcc.target/arm/multilib.exp b/gcc/testsuite/gcc.target/arm/multilib.exp
|
||||
index 4b30025db..e3f06c316 100644
|
||||
--- a/gcc/testsuite/gcc.target/arm/multilib.exp
|
||||
+++ b/gcc/testsuite/gcc.target/arm/multilib.exp
|
||||
@@ -135,6 +135,14 @@ if {[multilib_config "aprofile"] } {
|
||||
{-march=armv8.6-a+simd+fp16 -mfloat-abi=softfp} "thumb/v8-a+simd/softfp"
|
||||
{-march=armv8.6-a+simd+fp16+nofp -mfloat-abi=softfp} "thumb/v8-a/nofp"
|
||||
{-march=armv8.6-a+simd+nofp+fp16 -mfloat-abi=softfp} "thumb/v8-a+simd/softfp"
|
||||
+ {-march=armv9-a+crypto -mfloat-abi=soft} "thumb/v9-a/nofp"
|
||||
+ {-march=armv9-a+simd+crypto -mfloat-abi=softfp} "thumb/v9-a+simd/softfp"
|
||||
+ {-march=armv9-a+simd+crypto+nofp -mfloat-abi=softfp} "thumb/v9-a/nofp"
|
||||
+ {-march=armv9-a+simd+nofp+crypto -mfloat-abi=softfp} "thumb/v9-a+simd/softfp"
|
||||
+ {-march=armv9-a+fp16 -mfloat-abi=soft} "thumb/v9-a/nofp"
|
||||
+ {-march=armv9-a+simd+fp16 -mfloat-abi=softfp} "thumb/v9-a+simd/softfp"
|
||||
+ {-march=armv9-a+simd+fp16+nofp -mfloat-abi=softfp} "thumb/v9-a/nofp"
|
||||
+ {-march=armv9-a+simd+nofp+fp16 -mfloat-abi=softfp} "thumb/v9-a+simd/softfp"
|
||||
{-mcpu=cortex-a53+crypto -mfloat-abi=hard} "thumb/v8-a+simd/hard"
|
||||
{-mcpu=cortex-a53+nofp -mfloat-abi=softfp} "thumb/v8-a/nofp"
|
||||
{-march=armv8-a+crc -mfloat-abi=hard -mfpu=vfp} "thumb/v8-a+simd/hard"
|
||||
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
|
||||
index 857e57218..52e043917 100644
|
||||
--- a/gcc/testsuite/lib/target-supports.exp
|
||||
+++ b/gcc/testsuite/lib/target-supports.exp
|
||||
@@ -4820,7 +4820,8 @@ foreach { armfunc armflag armdefs } {
|
||||
v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
|
||||
__ARM_ARCH_8M_BASE__
|
||||
v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
|
||||
- v8_1m_main "-march=armv8.1-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } {
|
||||
+ v8_1m_main "-march=armv8.1-m.main -mthumb" __ARM_ARCH_8M_MAIN__
|
||||
+ v9a "-march=armv9-a" __ARM_ARCH_9A__ } {
|
||||
eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
|
||||
proc check_effective_target_arm_arch_FUNC_ok { } {
|
||||
return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
|
||||
--
|
||||
2.34.1
|
||||
|
||||
Reference in New Issue
Block a user