binutils: Upgrade to 2.31 release branch

(From OE-Core rev: 7eeec2ad91eca6ba44ea7b761d47082f4ebb04cc)

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>

meta/conf/distro/include/tcmode-default.inc

@@ -24,7 +24,7 @@ PREFERRED_PROVIDER_virtual/gettext ??= "gettext"
 
 GCCVERSION ?= "8.%"
 SDKGCCVERSION ?= "${GCCVERSION}"
-BINUVERSION ?= "2.30%"
+BINUVERSION ?= "2.31%"
 GDBVERSION ?= "8.1%"
 GLIBCVERSION ?= "2.27%"
 LINUXLIBCVERSION ?= "4.15%"

meta/recipes-devtools/binutils/binutils-2.31.inc

@@ -18,7 +18,7 @@ BINUPV = "${@binutils_branch_version(d)}"
 
 UPSTREAM_CHECK_GITTAGREGEX = "binutils-(?P<pver>\d+_(\d_?)*)"
 
-SRCREV ?= "caa839fba66600a6c36d3639906ed9110b79c307"
+SRCREV ?= "f8b4d71490df766ca9c474f7ab9c82b3a8029a5a"
 BINUTILS_GIT_URI ?= "git://sourceware.org/git/binutils-gdb.git;branch=binutils-${BINUPV}-branch;protocol=git"
 SRC_URI = "\
      ${BINUTILS_GIT_URI} \

meta/recipes-devtools/binutils/binutils/0001-binutils-crosssdk-Generate-relocatable-SDKs.patch

@@ -1,4 +1,4 @@
-From 2e1b5e24a6759de7f73aa6060a574848d9131b5a Mon Sep 17 00:00:00 2001
+From 4a99f058030c86794bb96b582a7dbd631f963b06 Mon Sep 17 00:00:00 2001
 From: Khem Raj <raj.khem@gmail.com>
 Date: Mon, 2 Mar 2015 01:58:54 +0000
 Subject: [PATCH 01/15] binutils-crosssdk: Generate relocatable SDKs
@@ -18,10 +18,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com>
  2 files changed, 5 insertions(+), 2 deletions(-)
 
 diff --git a/ld/genscripts.sh b/ld/genscripts.sh
-index 8732422b3a..1f257e99ca 100755
+index 370b22269d..a5c367aa8f 100755
 --- a/ld/genscripts.sh
 +++ b/ld/genscripts.sh
-@@ -277,6 +277,7 @@ DATA_ALIGNMENT_u="${DATA_ALIGNMENT_u-${DATA_ALIGNMENT_r}}"
+@@ -279,6 +279,7 @@ DATA_ALIGNMENT_u="${DATA_ALIGNMENT_u-${DATA_ALIGNMENT_r}}"
  LD_FLAG=r
  DATA_ALIGNMENT=${DATA_ALIGNMENT_r}
  DEFAULT_DATA_ALIGNMENT="ALIGN(${SEGMENT_SIZE})"
@@ -29,7 +29,7 @@ index 8732422b3a..1f257e99ca 100755
  ( echo "/* Script for ld -r: link without relocation */"
    . ${CUSTOMIZER_SCRIPT}
    . ${srcdir}/scripttempl/${SCRIPT_NAME}.sc
-@@ -285,10 +286,12 @@ DEFAULT_DATA_ALIGNMENT="ALIGN(${SEGMENT_SIZE})"
+@@ -287,10 +288,12 @@ DEFAULT_DATA_ALIGNMENT="ALIGN(${SEGMENT_SIZE})"
  LD_FLAG=u
  DATA_ALIGNMENT=${DATA_ALIGNMENT_u}
  CONSTRUCTING=" "
@@ -43,7 +43,7 @@ index 8732422b3a..1f257e99ca 100755
  DATA_ALIGNMENT=${DATA_ALIGNMENT_}
  RELOCATING=" "
 diff --git a/ld/scripttempl/elf.sc b/ld/scripttempl/elf.sc
-index 9787ab5dac..0c8a93c2c8 100644
+index 444aef2942..afa99f736d 100644
 --- a/ld/scripttempl/elf.sc
 +++ b/ld/scripttempl/elf.sc
 @@ -139,8 +139,8 @@ if test -z "$DATA_SEGMENT_ALIGN"; then
@@ -58,5 +58,5 @@ index 9787ab5dac..0c8a93c2c8 100644
  if test -z "$PLT"; then
    IPLT=".iplt         ${RELOCATING-0} : { *(.iplt) }"
 -- 
-2.16.1
+2.18.0
 

meta/recipes-devtools/binutils/binutils/0002-binutils-cross-Do-not-generate-linker-script-directo.patch

@@ -1,4 +1,4 @@
-From 58ddf38fa53abb48b69dd76e398c73451ad1a5eb Mon Sep 17 00:00:00 2001
+From 6e78b1c88c040a742b7af82542ac7eb92eddda3d Mon Sep 17 00:00:00 2001
 From: Khem Raj <raj.khem@gmail.com>
 Date: Mon, 6 Mar 2017 23:37:05 -0800
 Subject: [PATCH 02/15] binutils-cross: Do not generate linker script
@@ -19,14 +19,14 @@ RP 2017/01/30
 
 Signed-off-by: Khem Raj <raj.khem@gmail.com>
 ---
- ld/genscripts.sh | 23 -----------------------
- 1 file changed, 23 deletions(-)
+ ld/genscripts.sh | 25 -------------------------
+ 1 file changed, 25 deletions(-)
 
 diff --git a/ld/genscripts.sh b/ld/genscripts.sh
-index 1f257e99ca..1583b73a2b 100755
+index a5c367aa8f..6cc9eed976 100755
 --- a/ld/genscripts.sh
 +++ b/ld/genscripts.sh
-@@ -189,29 +189,6 @@ append_to_lib_path()
+@@ -189,31 +189,6 @@ append_to_lib_path()
    fi
  }
  
@@ -44,10 +44,12 @@ index 1f257e99ca..1583b73a2b 100755
 -    # because 64bit libraries may be in both places, depending on
 -    # cross-development setup method (e.g.: /usr/s390x-linux/lib64
 -    # vs. /usr/s390-linux/lib64)
--    case "${NATIVE}:${LIBPATH_SUFFIX}:${TOOL_LIB}" in
--      :* | *::* | *:*:*${LIBPATH_SUFFIX}) ;;
--      *) libs="${exec_prefix}/${target_alias}/lib${LIBPATH_SUFFIX}" ;;
--    esac
+-    for libpath_suffix in ${LIBPATH_SUFFIX}; do
+-      case "${NATIVE}:${libpath_suffix}:${TOOL_LIB}" in
+-	:* | *::* | *:*:*${libpath_suffix}) ;;
+-	*) libs="${exec_prefix}/${target_alias}/lib${libpath_suffix}" ;;
+-      esac
+-    done
 -    libs="${exec_prefix}/${TOOL_LIB}/lib ${libs}"
 -  fi
 -  append_to_lib_path ${libs}
@@ -57,5 +59,5 @@ index 1f257e99ca..1583b73a2b 100755
    libs=${NATIVE_LIB_DIRS}
    if [ "x${NATIVE}" = "xyes" ] ; then
 -- 
-2.16.1
+2.18.0
 

meta/recipes-devtools/binutils/binutils/0003-configure-widen-the-regexp-for-SH-architectures.patch

@@ -1,4 +1,4 @@
-From 5089be88f670bcadf7db0e778894f900b2c05d7b Mon Sep 17 00:00:00 2001
+From 4c6fd8f5eb9bc7c0d02f1a98ad86e395d4d2ab3b Mon Sep 17 00:00:00 2001
 From: Khem Raj <raj.khem@gmail.com>
 Date: Mon, 2 Mar 2015 01:07:33 +0000
 Subject: [PATCH 03/15] configure: widen the regexp for SH architectures
@@ -14,10 +14,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com>
  2 files changed, 6 insertions(+), 1 deletion(-)
 
 diff --git a/configure b/configure
-index 2d615a9996..c4ad45c06c 100755
+index 08dd35c3ea..815e74ddb7 100755
 --- a/configure
 +++ b/configure
-@@ -3835,7 +3835,7 @@ case "${target}" in
+@@ -3855,7 +3855,7 @@ case "${target}" in
    nvptx*-*-*)
      noconfigdirs="$noconfigdirs target-libssp target-libstdc++-v3 target-libobjc"
      ;;
@@ -27,10 +27,10 @@ index 2d615a9996..c4ad45c06c 100755
        sh*-*-elf)
           ;;
 diff --git a/gprof/configure b/gprof/configure
-index 1e25102976..6b43bf2b18 100755
+index 447cea7884..a730e20509 100755
 --- a/gprof/configure
 +++ b/gprof/configure
-@@ -5874,6 +5874,11 @@ linux* | k*bsd*-gnu | kopensolaris*-gnu)
+@@ -6162,6 +6162,11 @@ linux* | k*bsd*-gnu | kopensolaris*-gnu)
    lt_cv_deplibs_check_method=pass_all
    ;;
  
@@ -43,5 +43,5 @@ index 1e25102976..6b43bf2b18 100755
    if echo __ELF__ | $CC -E - | $GREP __ELF__ > /dev/null; then
      lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|_pic\.a)$'
 -- 
-2.16.1
+2.18.0
 

meta/recipes-devtools/binutils/binutils/0004-Point-scripts-location-to-libdir.patch

@@ -1,4 +1,4 @@
-From a0e893ea094c48fa803046ffa89e31907aee0597 Mon Sep 17 00:00:00 2001
+From 48ad5292b10408d4e5d5739022753a7183a1cbb3 Mon Sep 17 00:00:00 2001
 From: Khem Raj <raj.khem@gmail.com>
 Date: Mon, 2 Mar 2015 01:09:58 +0000
 Subject: [PATCH 04/15] Point scripts location to libdir
@@ -12,7 +12,7 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com>
  2 files changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/ld/Makefile.am b/ld/Makefile.am
-index 6243c12528..3c5d6c8202 100644
+index d86ad0940c..c95b0ef025 100644
 --- a/ld/Makefile.am
 +++ b/ld/Makefile.am
 @@ -57,7 +57,7 @@ endif
@@ -25,10 +25,10 @@ index 6243c12528..3c5d6c8202 100644
  EMUL = @EMUL@
  EMULATION_OFILES = @EMULATION_OFILES@
 diff --git a/ld/Makefile.in b/ld/Makefile.in
-index 760c037f9d..6dea692869 100644
+index 4792b2b013..789df2d01b 100644
 --- a/ld/Makefile.in
 +++ b/ld/Makefile.in
-@@ -446,7 +446,7 @@ AM_CFLAGS = $(WARN_CFLAGS) $(ELF_CLFAGS)
+@@ -563,7 +563,7 @@ AM_CFLAGS = $(WARN_CFLAGS) $(ELF_CLFAGS)
  # We put the scripts in the directory $(scriptdir)/ldscripts.
  # We can't put the scripts in $(datadir) because the SEARCH_DIR
  # directives need to be different for native and cross linkers.
@@ -38,5 +38,5 @@ index 760c037f9d..6dea692869 100644
  BFDDIR = $(BASEDIR)/bfd
  INCDIR = $(BASEDIR)/include
 -- 
-2.16.1
+2.18.0
 

meta/recipes-devtools/binutils/binutils/0005-Only-generate-an-RPATH-entry-if-LD_RUN_PATH-is-not-e.patch

@@ -1,4 +1,4 @@
-From 518abb195d0eb47d8eef581d7fd0a5fd9fa73f7d Mon Sep 17 00:00:00 2001
+From 79e53510b1f9e16a21db312698fb1c1c442481e7 Mon Sep 17 00:00:00 2001
 From: Khem Raj <raj.khem@gmail.com>
 Date: Mon, 2 Mar 2015 01:27:17 +0000
 Subject: [PATCH 05/15] Only generate an RPATH entry if LD_RUN_PATH is not
@@ -15,10 +15,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com>
  1 file changed, 4 insertions(+)
 
 diff --git a/ld/emultempl/elf32.em b/ld/emultempl/elf32.em
-index c0925fc9b9..7d7670a89f 100644
+index 1ad9d6b6fa..6a025a45b4 100644
 --- a/ld/emultempl/elf32.em
 +++ b/ld/emultempl/elf32.em
-@@ -1470,6 +1470,8 @@ fragment <<EOF
+@@ -1471,6 +1471,8 @@ fragment <<EOF
  	      && command_line.rpath == NULL)
  	    {
  	      path = (const char *) getenv ("LD_RUN_PATH");
@@ -27,7 +27,7 @@ index c0925fc9b9..7d7670a89f 100644
  	      if (path
  		  && gld${EMULATION_NAME}_search_needed (path, &n, force))
  		break;
-@@ -1750,6 +1752,8 @@ gld${EMULATION_NAME}_before_allocation (void)
+@@ -1751,6 +1753,8 @@ gld${EMULATION_NAME}_before_allocation (void)
    rpath = command_line.rpath;
    if (rpath == NULL)
      rpath = (const char *) getenv ("LD_RUN_PATH");
@@ -37,5 +37,5 @@ index c0925fc9b9..7d7670a89f 100644
    for (abfd = link_info.input_bfds; abfd; abfd = abfd->link.next)
      if (bfd_get_flavour (abfd) == bfd_target_elf_flavour)
 -- 
-2.16.1
+2.18.0
 

meta/recipes-devtools/binutils/binutils/0007-Add-the-armv5e-architecture-to-binutils.patch

@@ -1,4 +1,4 @@
-From 697903256e09533778baa8af66402c44d70219d9 Mon Sep 17 00:00:00 2001
+From ef50d848d983f81e4a86dd3eef4933e3579336f1 Mon Sep 17 00:00:00 2001
 From: Khem Raj <raj.khem@gmail.com>
 Date: Mon, 2 Mar 2015 01:37:10 +0000
 Subject: [PATCH 07/15] Add the armv5e architecture to binutils
@@ -19,10 +19,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com>
  1 file changed, 1 insertion(+)
 
 diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
-index ec50420518..a25d1721af 100644
+index 3f5384e1c7..8d5bc145af 100644
 --- a/gas/config/tc-arm.c
 +++ b/gas/config/tc-arm.c
-@@ -26195,6 +26195,7 @@ static const struct arm_arch_option_table arm_archs[] =
+@@ -26294,6 +26294,7 @@ static const struct arm_arch_option_table arm_archs[] =
    ARM_ARCH_OPT ("armv4t",	ARM_ARCH_V4T,	 FPU_ARCH_FPA),
    ARM_ARCH_OPT ("armv4txm",	ARM_ARCH_V4TxM,	 FPU_ARCH_FPA),
    ARM_ARCH_OPT ("armv5",	ARM_ARCH_V5,	 FPU_ARCH_VFP),
@@ -31,5 +31,5 @@ index ec50420518..a25d1721af 100644
    ARM_ARCH_OPT ("armv5txm",	ARM_ARCH_V5TxM,	 FPU_ARCH_VFP),
    ARM_ARCH_OPT ("armv5te",	ARM_ARCH_V5TE,	 FPU_ARCH_VFP),
 -- 
-2.16.1
+2.18.0
 

meta/recipes-devtools/binutils/binutils/0008-don-t-let-the-distro-compiler-point-to-the-wrong-ins.patch

@@ -1,4 +1,4 @@
-From 622d66634eb2e509d4126f5bdcab26de367241a1 Mon Sep 17 00:00:00 2001
+From ca25d55cef8398bad508c2b2be29aea5aa3c4d26 Mon Sep 17 00:00:00 2001
 From: Khem Raj <raj.khem@gmail.com>
 Date: Mon, 2 Mar 2015 01:39:01 +0000
 Subject: [PATCH 08/15] don't let the distro compiler point to the wrong
@@ -31,5 +31,5 @@ index ed1b334c36..d4ffd8b57b 100644
  	if test -n "${target_header_dir}"; then \
  		${mkinstalldirs} $(DESTDIR)$(libdir)/$(MULTIOSDIR); \
 -- 
-2.16.1
+2.18.0
 

meta/recipes-devtools/binutils/binutils/0009-warn-for-uses-of-system-directories-when-cross-linki.patch

@@ -1,4 +1,4 @@
-From 27e38ee92c24fca86b1c3f6ef156a1892dd06bfd Mon Sep 17 00:00:00 2001
+From a3667059fc0d52d890b505bed0e5050ea3d7002e Mon Sep 17 00:00:00 2001
 From: Khem Raj <raj.khem@gmail.com>
 Date: Fri, 15 Jan 2016 06:31:09 +0000
 Subject: [PATCH 09/15] warn for uses of system directories when cross linking
@@ -55,7 +55,7 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com>
  ld/configure    | 16 ++++++++++++++++
  ld/configure.ac | 10 ++++++++++
  ld/ld.h         |  8 ++++++++
- ld/ld.texinfo   | 12 ++++++++++++
+ ld/ld.texi      | 12 ++++++++++++
  ld/ldfile.c     | 17 +++++++++++++++++
  ld/ldlex.h      |  2 ++
  ld/ldmain.c     |  2 ++
@@ -63,10 +63,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com>
  9 files changed, 86 insertions(+)
 
 diff --git a/ld/config.in b/ld/config.in
-index a846743da6..df3cd5fb60 100644
+index d93c9b0830..5da2742bea 100644
 --- a/ld/config.in
 +++ b/ld/config.in
-@@ -27,6 +27,9 @@
+@@ -31,6 +31,9 @@
     language is requested. */
  #undef ENABLE_NLS
  
@@ -77,10 +77,10 @@ index a846743da6..df3cd5fb60 100644
  #undef EXTRA_SHLIB_EXTENSION
  
 diff --git a/ld/configure b/ld/configure
-index db8b998722..489ead5c13 100755
+index 2b291f0da8..facc386563 100755
 --- a/ld/configure
 +++ b/ld/configure
-@@ -789,6 +789,7 @@ with_lib_path
+@@ -826,6 +826,7 @@ with_lib_path
  enable_targets
  enable_64_bit_bfd
  with_sysroot
@@ -88,7 +88,7 @@ index db8b998722..489ead5c13 100755
  enable_gold
  enable_got
  enable_compressed_debug_sections
-@@ -1448,6 +1449,8 @@ Optional Features:
+@@ -1490,6 +1491,8 @@ Optional Features:
    --disable-largefile     omit support for large files
    --enable-targets        alternative target configurations
    --enable-64-bit-bfd     64-bit support (on hosts with narrower word sizes)
@@ -97,7 +97,7 @@ index db8b998722..489ead5c13 100755
    --enable-gold[=ARG]     build gold [ARG={default,yes,no}]
    --enable-got=<type>     GOT handling scheme (target, single, negative,
                            multigot)
-@@ -16315,6 +16318,19 @@ fi
+@@ -16618,6 +16621,19 @@ fi
  
  
  
@@ -118,10 +118,10 @@ index db8b998722..489ead5c13 100755
  if test "${enable_gold+set}" = set; then :
    enableval=$enable_gold; case "${enableval}" in
 diff --git a/ld/configure.ac b/ld/configure.ac
-index bada1b50b0..d074a3820b 100644
+index d10c553650..9f1b57b120 100644
 --- a/ld/configure.ac
 +++ b/ld/configure.ac
-@@ -95,6 +95,16 @@ AC_SUBST(use_sysroot)
+@@ -94,6 +94,16 @@ AC_SUBST(use_sysroot)
  AC_SUBST(TARGET_SYSTEM_ROOT)
  AC_SUBST(TARGET_SYSTEM_ROOT_DEFINE)
  
@@ -157,11 +157,11 @@ index ba914b921e..9df17dab6c 100644
    /* Big or little endian as set on command line.  */
    enum endian_enum endian;
  
-diff --git a/ld/ld.texinfo b/ld/ld.texinfo
-index c89915f1aa..df430837e2 100644
---- a/ld/ld.texinfo
-+++ b/ld/ld.texinfo
-@@ -2498,6 +2498,18 @@ string identifying the original linked file does not change.
+diff --git a/ld/ld.texi b/ld/ld.texi
+index b9fe2324da..43486605e0 100644
+--- a/ld/ld.texi
++++ b/ld/ld.texi
+@@ -2479,6 +2479,18 @@ string identifying the original linked file does not change.
  
  Passing @code{none} for @var{style} disables the setting from any
  @code{--build-id} options earlier on the command line.
@@ -181,7 +181,7 @@ index c89915f1aa..df430837e2 100644
  
  @c man end
 diff --git a/ld/ldfile.c b/ld/ldfile.c
-index 6532a57d96..f943f0b2e5 100644
+index a72ff13526..dc5148f748 100644
 --- a/ld/ldfile.c
 +++ b/ld/ldfile.c
 @@ -116,6 +116,23 @@ ldfile_add_library_path (const char *name, bfd_boolean cmdline)
@@ -209,10 +209,10 @@ index 6532a57d96..f943f0b2e5 100644
  
  /* Try to open a BFD for a lang_input_statement.  */
 diff --git a/ld/ldlex.h b/ld/ldlex.h
-index 140ed1d9da..9965cbc04f 100644
+index 04d6fd5f96..d7df005bb2 100644
 --- a/ld/ldlex.h
 +++ b/ld/ldlex.h
-@@ -147,6 +147,8 @@ enum option_values
+@@ -148,6 +148,8 @@ enum option_values
    OPTION_REQUIRE_DEFINED_SYMBOL,
    OPTION_ORPHAN_HANDLING,
    OPTION_FORCE_GROUP_ALLOCATION,
@@ -222,10 +222,10 @@ index 140ed1d9da..9965cbc04f 100644
  
  /* The initial parser states.  */
 diff --git a/ld/ldmain.c b/ld/ldmain.c
-index c473ed24c3..adae0b4610 100644
+index f31eeb29c3..25f8497888 100644
 --- a/ld/ldmain.c
 +++ b/ld/ldmain.c
-@@ -261,6 +261,8 @@ main (int argc, char **argv)
+@@ -268,6 +268,8 @@ main (int argc, char **argv)
    command_line.warn_mismatch = TRUE;
    command_line.warn_search_mismatch = TRUE;
    command_line.check_section_addresses = -1;
@@ -235,10 +235,10 @@ index c473ed24c3..adae0b4610 100644
    /* We initialize DEMANGLING based on the environment variable
       COLLECT_NO_DEMANGLE.  The gcc collect2 program will demangle the
 diff --git a/ld/lexsup.c b/ld/lexsup.c
-index f2191602d4..bccb3bdeef 100644
+index 86a033a383..4a40d48020 100644
 --- a/ld/lexsup.c
 +++ b/ld/lexsup.c
-@@ -538,6 +538,14 @@ static const struct ld_option ld_options[] =
+@@ -543,6 +543,14 @@ static const struct ld_option ld_options[] =
    { {"orphan-handling", required_argument, NULL, OPTION_ORPHAN_HANDLING},
      '\0', N_("=MODE"), N_("Control how orphan sections are handled."),
      TWO_DASHES },
@@ -253,8 +253,8 @@ index f2191602d4..bccb3bdeef 100644
  };
  
  #define OPTION_COUNT ARRAY_SIZE (ld_options)
-@@ -1568,6 +1576,14 @@ parse_args (unsigned argc, char **argv)
- 	    einfo (_("%P%F: invalid argument to option"
+@@ -1577,6 +1585,14 @@ parse_args (unsigned argc, char **argv)
+ 	    einfo (_("%F%P: invalid argument to option"
  		     " \"--orphan-handling\"\n"));
  	  break;
 +
@@ -269,5 +269,5 @@ index f2191602d4..bccb3bdeef 100644
      }
  
 -- 
-2.16.1
+2.18.0
 

meta/recipes-devtools/binutils/binutils/0010-Fix-rpath-in-libtool-when-sysroot-is-enabled.patch

@@ -1,4 +1,4 @@
-From e205ae05c41a8cc8d47708f0a3b6f740e2bf2526 Mon Sep 17 00:00:00 2001
+From 9e1d8f9a657a8bd48048c2ea6407cf60b723bd68 Mon Sep 17 00:00:00 2001
 From: Khem Raj <raj.khem@gmail.com>
 Date: Mon, 2 Mar 2015 01:42:38 +0000
 Subject: [PATCH 10/15] Fix rpath in libtool when sysroot is enabled
@@ -48,5 +48,5 @@ index 70e856e065..11ee684ccc 100644
  	    if test -z "$hardcode_libdirs"; then
  	      hardcode_libdirs="$libdir"
 -- 
-2.16.1
+2.18.0
 

meta/recipes-devtools/binutils/binutils/0011-Change-default-emulation-for-mips64-linux.patch

@@ -1,4 +1,4 @@
-From 7978c1299021033c35c29c94e0997235f7ede248 Mon Sep 17 00:00:00 2001
+From 2d2e2fcdd9646849716ee99d8d3e5d72ae8889bc Mon Sep 17 00:00:00 2001
 From: Khem Raj <raj.khem@gmail.com>
 Date: Mon, 2 Mar 2015 01:44:14 +0000
 Subject: [PATCH 11/15] Change default emulation for mips64*-*-linux
@@ -14,10 +14,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com>
  2 files changed, 8 insertions(+), 8 deletions(-)
 
 diff --git a/bfd/config.bfd b/bfd/config.bfd
-index f04a993f06..8777f96bd2 100644
+index 6391f35684..8a11c0680a 100644
 --- a/bfd/config.bfd
 +++ b/bfd/config.bfd
-@@ -1189,12 +1189,12 @@ case "${targ}" in
+@@ -913,12 +913,12 @@ case "${targ}" in
      targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec mips_ecoff_be_vec mips_ecoff_le_vec"
      ;;
    mips64*el-*-linux*)
@@ -35,10 +35,10 @@ index f04a993f06..8777f96bd2 100644
    mips*el-*-linux*)
      targ_defvec=mips_elf32_trad_le_vec
 diff --git a/ld/configure.tgt b/ld/configure.tgt
-index 6183a85b3d..1d78465590 100644
+index fad8b2e5c8..7fb2168503 100644
 --- a/ld/configure.tgt
 +++ b/ld/configure.tgt
-@@ -535,11 +535,11 @@ mips*el-*-vxworks*)	targ_emul=elf32elmipvxworks
+@@ -464,11 +464,11 @@ mips*el-*-vxworks*)	targ_emul=elf32elmipvxworks
  mips*-*-vxworks*)	targ_emul=elf32ebmipvxworks
  			targ_extra_emuls="elf32elmipvxworks" ;;
  mips*-*-windiss)	targ_emul=elf32mipswindiss ;;
@@ -55,5 +55,5 @@ index 6183a85b3d..1d78465590 100644
  mips*el-*-linux-*)	targ_emul=elf32ltsmip
  			targ_extra_emuls="elf32btsmip elf32ltsmipn32 elf64ltsmip elf32btsmipn32 elf64btsmip"
 -- 
-2.16.1
+2.18.0
 

meta/recipes-devtools/binutils/binutils/0012-Add-support-for-Netlogic-XLP.patch

@@ -1,4 +1,4 @@
-From 3b40bf584615f794b85fd50d4d0a5c0a1d2ee7bf Mon Sep 17 00:00:00 2001
+From 96ff7570c29f792c466a933529fefda9b8e97994 Mon Sep 17 00:00:00 2001
 From: Khem Raj <raj.khem@gmail.com>
 Date: Sun, 14 Feb 2016 17:06:19 +0000
 Subject: [PATCH 12/15] Add support for Netlogic XLP
@@ -34,10 +34,10 @@ Signed-off-by: Mark Hatle <mark.hatle@windriver.com>
  14 files changed, 61 insertions(+), 21 deletions(-)
 
 diff --git a/bfd/aoutx.h b/bfd/aoutx.h
-index eec9c4ad2a..3bf0a71e63 100644
+index 023843b0be..46246fec2d 100644
 --- a/bfd/aoutx.h
 +++ b/bfd/aoutx.h
-@@ -814,6 +814,7 @@ NAME (aout, machine_type) (enum bfd_architecture arch,
+@@ -798,6 +798,7 @@ NAME (aout, machine_type) (enum bfd_architecture arch,
  	case bfd_mach_mipsisa64r6:
  	case bfd_mach_mips_sb1:
  	case bfd_mach_mips_xlr:
@@ -46,10 +46,10 @@ index eec9c4ad2a..3bf0a71e63 100644
  	  arch_flags = M_MIPS2;
  	  break;
 diff --git a/bfd/archures.c b/bfd/archures.c
-index e83c57a2f3..3016ea1bae 100644
+index 282e983086..b38b05d132 100644
 --- a/bfd/archures.c
 +++ b/bfd/archures.c
-@@ -201,6 +201,7 @@ DESCRIPTION
+@@ -183,6 +183,7 @@ DESCRIPTION
  .#define bfd_mach_mips_octeon3		6503
  .#define bfd_mach_mips_xlr		887682	 {* decimal 'XLR'.  *}
  .#define bfd_mach_mips_interaptiv_mr2	736550	 {* decimal 'IA2'.  *}
@@ -58,10 +58,10 @@ index e83c57a2f3..3016ea1bae 100644
  .#define bfd_mach_mipsisa32r2		33
  .#define bfd_mach_mipsisa32r3		34
 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
-index 42991e7848..27abc5d5a8 100644
+index 93745bd3fd..326e9e49ed 100644
 --- a/bfd/bfd-in2.h
 +++ b/bfd/bfd-in2.h
-@@ -2062,6 +2062,7 @@ enum bfd_architecture
+@@ -2054,6 +2054,7 @@ enum bfd_architecture
  #define bfd_mach_mips_octeon3          6503
  #define bfd_mach_mips_xlr              887682   /* decimal 'XLR'.  */
  #define bfd_mach_mips_interaptiv_mr2   736550   /* decimal 'IA2'.  */
@@ -70,10 +70,10 @@ index 42991e7848..27abc5d5a8 100644
  #define bfd_mach_mipsisa32r2           33
  #define bfd_mach_mipsisa32r3           34
 diff --git a/bfd/config.bfd b/bfd/config.bfd
-index 8777f96bd2..7b80bda8c9 100644
+index 8a11c0680a..c882421343 100644
 --- a/bfd/config.bfd
 +++ b/bfd/config.bfd
-@@ -1172,6 +1172,11 @@ case "${targ}" in
+@@ -896,6 +896,11 @@ case "${targ}" in
      targ_defvec=mips_elf32_le_vec
      targ_selvecs="mips_elf32_be_vec mips_elf64_be_vec mips_elf64_le_vec"
      ;;
@@ -110,10 +110,10 @@ index cb50c64371..2b9d1d6ecf 100644
  
  /* The default architecture is mips:3000, but with a machine number of
 diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
-index 285401367d..14ebb5f175 100644
+index d91942301c..5d1bd3f0b1 100644
 --- a/bfd/elfxx-mips.c
 +++ b/bfd/elfxx-mips.c
-@@ -6806,6 +6806,9 @@ _bfd_elf_mips_mach (flagword flags)
+@@ -6805,6 +6805,9 @@ _bfd_elf_mips_mach (flagword flags)
      case E_MIPS_MACH_IAMR2:
        return bfd_mach_mips_interaptiv_mr2;
  
@@ -123,7 +123,7 @@ index 285401367d..14ebb5f175 100644
      default:
        switch (flags & EF_MIPS_ARCH)
  	{
-@@ -11963,6 +11966,10 @@ mips_set_isa_flags (bfd *abfd)
+@@ -12003,6 +12006,10 @@ mips_set_isa_flags (bfd *abfd)
        val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_OCTEON2;
        break;
  
@@ -134,7 +134,7 @@ index 285401367d..14ebb5f175 100644
      case bfd_mach_mipsisa32:
        val = E_MIPS_ARCH_32;
        break;
-@@ -13936,6 +13943,7 @@ static const struct mips_mach_extension mips_mach_extensions[] =
+@@ -13992,6 +13999,7 @@ static const struct mips_mach_extension mips_mach_extensions[] =
    { bfd_mach_mips_octeonp, bfd_mach_mips_octeon },
    { bfd_mach_mips_octeon, bfd_mach_mipsisa64r2 },
    { bfd_mach_mips_loongson_3a, bfd_mach_mipsisa64r2 },
@@ -143,10 +143,10 @@ index 285401367d..14ebb5f175 100644
    /* MIPS64 extensions.  */
    { bfd_mach_mipsisa64r2, bfd_mach_mipsisa64 },
 diff --git a/binutils/readelf.c b/binutils/readelf.c
-index ae1cda9a7b..fed0387a94 100644
+index 2b78db219b..7a7178925f 100644
 --- a/binutils/readelf.c
 +++ b/binutils/readelf.c
-@@ -3370,6 +3370,7 @@ get_machine_flags (Filedata * filedata, unsigned e_flags, unsigned e_machine)
+@@ -3403,6 +3403,7 @@ get_machine_flags (Filedata * filedata, unsigned e_flags, unsigned e_machine)
  	    case E_MIPS_MACH_OCTEON3: strcat (buf, ", octeon3"); break;
  	    case E_MIPS_MACH_XLR:  strcat (buf, ", xlr"); break;
  	    case E_MIPS_MACH_IAMR2:  strcat (buf, ", interaptiv-mr2"); break;
@@ -155,7 +155,7 @@ index ae1cda9a7b..fed0387a94 100644
  	    /* We simply ignore the field in this case to avoid confusion:
  	       MIPS ELF does not specify EF_MIPS_MACH, it is a GNU
 diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
-index c135131b59..d8fbda8e31 100644
+index 59df787155..48537226c0 100644
 --- a/gas/config/tc-mips.c
 +++ b/gas/config/tc-mips.c
 @@ -552,6 +552,7 @@ static int mips_32bitmode = 0;
@@ -174,7 +174,7 @@ index c135131b59..d8fbda8e31 100644
     )
  
  /* Whether the processor uses hardware interlocks to protect reads
-@@ -19737,7 +19739,7 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
+@@ -19778,7 +19780,7 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
    /* Broadcom XLP.
       XLP is mostly like XLR, with the prominent exception that it is
       MIPS64R2 rather than MIPS64.  */
@@ -184,10 +184,10 @@ index c135131b59..d8fbda8e31 100644
    /* MIPS 64 Release 6 */
    { "i6400",	      0, ASE_MSA,		ISA_MIPS64R6, CPU_MIPS64R6},
 diff --git a/gas/configure b/gas/configure
-index a40ac2144f..65a6995243 100755
+index 134278fa25..2fdca147a1 100755
 --- a/gas/configure
 +++ b/gas/configure
-@@ -12989,6 +12989,9 @@ _ACEOF
+@@ -13336,6 +13336,9 @@ _ACEOF
  	  mipsisa64r6 | mipsisa64r6el)
  	    mips_cpu=mips64r6
  	    ;;
@@ -198,7 +198,7 @@ index a40ac2144f..65a6995243 100755
  	    mips_cpu=r3900
  	    ;;
 diff --git a/include/elf/mips.h b/include/elf/mips.h
-index 9de0b4e175..74fc4f7e55 100644
+index 4e2cde3279..c329f38929 100644
 --- a/include/elf/mips.h
 +++ b/include/elf/mips.h
 @@ -290,6 +290,7 @@ END_RELOC_NUMBERS (R_MIPS_maxext)
@@ -210,10 +210,10 @@ index 9de0b4e175..74fc4f7e55 100644
  #define E_MIPS_MACH_OCTEON3	0x008e0000
  #define E_MIPS_MACH_5400	0x00910000
 diff --git a/include/opcode/mips.h b/include/opcode/mips.h
-index 5eea72f139..90f6d57e15 100644
+index 1ab1780567..74f457b579 100644
 --- a/include/opcode/mips.h
 +++ b/include/opcode/mips.h
-@@ -1259,6 +1259,8 @@ static const unsigned int mips_isa_table[] = {
+@@ -1262,6 +1262,8 @@ static const unsigned int mips_isa_table[] = {
  #define INSN_XLR                 0x00000020
  /* Imagination interAptiv MR2.  */
  #define INSN_INTERAPTIV_MR2	  0x04000000
@@ -222,7 +222,7 @@ index 5eea72f139..90f6d57e15 100644
  
  /* DSP ASE */
  #define ASE_DSP			0x00000001
-@@ -1365,6 +1367,7 @@ static const unsigned int mips_isa_table[] = {
+@@ -1373,6 +1375,7 @@ static const unsigned int mips_isa_table[] = {
  #define CPU_OCTEON3	6503
  #define CPU_XLR     	887682   	/* decimal 'XLR'   */
  #define CPU_INTERAPTIV_MR2 736550	/* decimal 'IA2'  */
@@ -230,7 +230,7 @@ index 5eea72f139..90f6d57e15 100644
  
  /* Return true if the given CPU is included in INSN_* mask MASK.  */
  
-@@ -1445,6 +1448,9 @@ cpu_is_member (int cpu, unsigned int mask)
+@@ -1453,6 +1456,9 @@ cpu_is_member (int cpu, unsigned int mask)
        return ((mask & INSN_ISA_MASK) == INSN_ISA32R6)
  	     || ((mask & INSN_ISA_MASK) == INSN_ISA64R6);
  
@@ -241,10 +241,10 @@ index 5eea72f139..90f6d57e15 100644
        return FALSE;
      }
 diff --git a/ld/configure.tgt b/ld/configure.tgt
-index 1d78465590..307e787b64 100644
+index 7fb2168503..a1db7adfe2 100644
 --- a/ld/configure.tgt
 +++ b/ld/configure.tgt
-@@ -521,6 +521,8 @@ mips*el-sde-elf* | mips*el-mti-elf* | mips*el-img-elf*)
+@@ -450,6 +450,8 @@ mips*el-sde-elf* | mips*el-mti-elf* | mips*el-img-elf*)
  mips*-sde-elf* | mips*-mti-elf* | mips*-img-elf*)
  			targ_emul=elf32btsmip
  			targ_extra_emuls="elf32ltsmip elf32btsmipn32 elf64btsmip elf32ltsmipn32 elf64ltsmip" ;;
@@ -254,10 +254,10 @@ index 1d78465590..307e787b64 100644
  			targ_extra_emuls="elf32lr5900"
  			targ_extra_libpath=$targ_extra_emuls ;;
 diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
-index 984fcbb802..95b107d216 100644
+index bbf21328e8..38e487c16f 100644
 --- a/opcodes/mips-dis.c
 +++ b/opcodes/mips-dis.c
-@@ -655,13 +655,11 @@ const struct mips_arch_choice mips_arch_choices[] =
+@@ -656,13 +656,11 @@ const struct mips_arch_choice mips_arch_choices[] =
      mips_cp0sel_names_xlr, ARRAY_SIZE (mips_cp0sel_names_xlr),
      mips_cp1_names_mips3264, mips_hwr_names_numeric },
  
@@ -277,10 +277,10 @@ index 984fcbb802..95b107d216 100644
    /* This entry, mips16, is here only for ISA/processor selection; do
       not print its name.  */
 diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
-index 180d613c93..65b7b8cc23 100644
+index 1cbcbc6abc..e1fbdc89de 100644
 --- a/opcodes/mips-opc.c
 +++ b/opcodes/mips-opc.c
-@@ -328,6 +328,7 @@ decode_mips_operand (const char *p)
+@@ -329,6 +329,7 @@ decode_mips_operand (const char *p)
  #define IOCT3	INSN_OCTEON3
  #define XLR     INSN_XLR
  #define IAMR2	INSN_INTERAPTIV_MR2
@@ -288,7 +288,7 @@ index 180d613c93..65b7b8cc23 100644
  #define IVIRT	ASE_VIRT
  #define IVIRT64	ASE_VIRT64
  
-@@ -966,6 +967,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
+@@ -974,6 +975,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
  {"clo",			"U,s",		0x70000021, 0xfc0007ff, WR_1|RD_2,		0,		I32|N55,	0,	I37 },
  {"clz",			"d,s",		0x00000050, 0xfc1f07ff, WR_1|RD_2,		0,		I37,		0,	0 },
  {"clz",			"U,s",		0x70000020, 0xfc0007ff, WR_1|RD_2,		0,		I32|N55,	0,	I37 },
@@ -296,7 +296,7 @@ index 180d613c93..65b7b8cc23 100644
  /* ctc0 is at the bottom of the table.  */
  {"ctc1",		"t,G",		0x44c00000, 0xffe007ff,	RD_1|WR_CC|CM,		0,		I1,		0,	0 },
  {"ctc1",		"t,S",		0x44c00000, 0xffe007ff,	RD_1|WR_CC|CM,		0,		I1,		0,	0 },
-@@ -998,12 +1000,13 @@ const struct mips_opcode mips_builtin_opcodes[] =
+@@ -1006,12 +1008,13 @@ const struct mips_opcode mips_builtin_opcodes[] =
  {"daddiu",		"t,r,j",	0x64000000, 0xfc000000, WR_1|RD_2,		0,		I3,		0,	0 },
  {"daddu",		"d,v,t",	0x0000002d, 0xfc0007ff, WR_1|RD_2|RD_3,		0,		I3,		0,	0 },
  {"daddu",		"t,r,I",	0,    (int) M_DADDU_I,	INSN_MACRO,		0,		I3,		0,	0 },
@@ -311,7 +311,7 @@ index 180d613c93..65b7b8cc23 100644
  /* dctr and dctw are used on the r5000.  */
  {"dctr",		"o(b)",	 	0xbc050000, 0xfc1f0000, RD_2,			0,		I3,		0,	0 },
  {"dctw",		"o(b)",		0xbc090000, 0xfc1f0000, RD_2,			0,		I3,		0,	0 },
-@@ -1075,6 +1078,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
+@@ -1083,6 +1086,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
  {"dmfc0",		"t,G,H",	0x40200000, 0xffe007f8,	WR_1|RD_C0|LC,		0,		I64,		0,	0 },
  {"dmfgc0",		"t,G",		0x40600100, 0xffe007ff, WR_1|RD_C0|LC,		0,		0,		IVIRT64, 0 },
  {"dmfgc0",		"t,G,H",	0x40600100, 0xffe007f8, WR_1|RD_C0|LC,		0,		0,		IVIRT64, 0 },
@@ -319,7 +319,7 @@ index 180d613c93..65b7b8cc23 100644
  {"dmt",			"",		0x41600bc1, 0xffffffff, TRAP,			0,		0,		MT32,	0 },
  {"dmt",			"t",		0x41600bc1, 0xffe0ffff, WR_1|TRAP,		0,		0,		MT32,	0 },
  {"dmtc0",		"t,G",		0x40a00000, 0xffe007ff,	RD_1|WR_C0|WR_CC|CM,	0,		I3,		0,	EE },
-@@ -1090,6 +1094,8 @@ const struct mips_opcode mips_builtin_opcodes[] =
+@@ -1098,6 +1102,8 @@ const struct mips_opcode mips_builtin_opcodes[] =
  /* dmfc3 is at the bottom of the table.  */
  /* dmtc3 is at the bottom of the table.  */
  {"dmuh",		"d,s,t",	0x000000dc, 0xfc0007ff, WR_1|RD_2|RD_3,		0,		I69,		0,	0 },
@@ -328,7 +328,7 @@ index 180d613c93..65b7b8cc23 100644
  {"dmul",		"d,s,t",	0x0000009c, 0xfc0007ff, WR_1|RD_2|RD_3,		0,		I69,		0,	0 },
  {"dmul",		"d,v,t",	0x70000003, 0xfc0007ff, WR_1|RD_2|RD_3|WR_HILO,	0,		IOCT,		0,	0 },
  {"dmul",		"d,v,t",	0,    (int) M_DMUL,	INSN_MACRO,		0,		I3,		0,	M32|I69 },
-@@ -1243,9 +1249,9 @@ const struct mips_opcode mips_builtin_opcodes[] =
+@@ -1251,9 +1257,9 @@ const struct mips_opcode mips_builtin_opcodes[] =
  {"ld",			"s,-b(+R)",	0xec180000, 0xfc1c0000, WR_1,			RD_pc,		I69,		0,	0 },
  {"ld",			"t,A(b)",	0,    (int) M_LD_AB,	INSN_MACRO,		0,		I1,		0,	0 },
  {"ld",			"t,o(b)",	0xdc000000, 0xfc000000, WR_1|RD_3|LM,		0,		I3,		0,	0 },
@@ -341,7 +341,7 @@ index 180d613c93..65b7b8cc23 100644
  {"ldc1",		"T,o(b)",	0xd4000000, 0xfc000000, WR_1|RD_3|CLD|FP_D,	0,		I2,		0,	SF },
  {"ldc1",		"E,o(b)",	0xd4000000, 0xfc000000, WR_1|RD_3|CLD|FP_D,	0,		I2,		0,	SF },
  {"ldc1",		"T,A(b)",	0,    (int) M_LDC1_AB,	INSN_MACRO,		INSN2_M_FP_D,	I2,		0,	SF },
-@@ -1410,7 +1416,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
+@@ -1418,7 +1424,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
  {"mflo",		"d,9",		0x00000012, 0xff9f07ff, WR_1|RD_LO,		0,		0,		D32,	0 },
  {"mflo1",		"d",		0x70000012, 0xffff07ff,	WR_1|RD_LO,		0,		EE,		0,	0 },
  {"mflhxu",		"d",		0x00000052, 0xffff07ff,	WR_1|MOD_HILO,		0,		0,		SMT,	0 },
@@ -350,7 +350,7 @@ index 180d613c93..65b7b8cc23 100644
  {"mfsa",		"d",		0x00000028, 0xffff07ff,	WR_1,			0,		EE,		0,	0 },
  {"min.ob",		"X,Y,Q",	0x78000006, 0xfc20003f,	WR_1|RD_2|RD_3|FP_D,	0,		SB1,		MX,	0 },
  {"min.ob",		"D,S,Q",	0x48000006, 0xfc20003f,	WR_1|RD_2|RD_3|FP_D,	0,		N54,		0,	0 },
-@@ -1455,10 +1461,13 @@ const struct mips_opcode mips_builtin_opcodes[] =
+@@ -1463,10 +1469,13 @@ const struct mips_opcode mips_builtin_opcodes[] =
  /* move is at the top of the table.  */
  {"msgn.qh",		"X,Y,Q",	0x78200000, 0xfc20003f,	WR_1|RD_2|RD_3|FP_D,	0,		0,		MX,	0 },
  {"msgsnd",		"t",		0,    (int) M_MSGSND,	INSN_MACRO,		0,		XLR,		0,	0 },
@@ -366,7 +366,7 @@ index 180d613c93..65b7b8cc23 100644
  {"msub.d",		"D,R,S,T",	0x4c000029, 0xfc00003f, WR_1|RD_2|RD_3|RD_4|FP_D, 0,		I4_33,		0,	I37 },
  {"msub.d",		"D,S,T",	0x46200019, 0xffe0003f,	WR_1|RD_2|RD_3|FP_D,	0,		IL2E,		0,	0 },
  {"msub.d",		"D,S,T",	0x72200019, 0xffe0003f,	WR_1|RD_2|RD_3|FP_D,	0,		IL2F,		0,	0 },
-@@ -1508,7 +1517,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
+@@ -1516,7 +1525,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
  {"mtlo",		"s,7",		0x00000013, 0xfc1fe7ff, RD_1|WR_LO,		0,		0,		D32,	0 },
  {"mtlo1",		"s",		0x70000013, 0xfc1fffff,	RD_1|WR_LO,		0,		EE,		0,	0 },
  {"mtlhx",		"s",		0x00000053, 0xfc1fffff,	RD_1|MOD_HILO,		0,		0,		SMT,	0 },
@@ -375,7 +375,7 @@ index 180d613c93..65b7b8cc23 100644
  {"mtm0",		"s",		0x70000008, 0xfc1fffff, RD_1,			0,		IOCT,		0,	0 },
  {"mtm0",    		"s,t",		0x70000008, 0xfc00ffff, RD_1|RD_2,		0,		IOCT3,		0,	0 },
  {"mtm1",		"s",		0x7000000c, 0xfc1fffff, RD_1,			0,		IOCT,		0,	0 },
-@@ -1945,9 +1954,9 @@ const struct mips_opcode mips_builtin_opcodes[] =
+@@ -1953,9 +1962,9 @@ const struct mips_opcode mips_builtin_opcodes[] =
  {"suxc1",		"S,t(b)",	0x4c00000d, 0xfc0007ff, RD_1|RD_2|RD_3|SM|FP_D,	0,		I5_33|N55,	0,	I37},
  {"sw",			"t,o(b)",	0xac000000, 0xfc000000,	RD_1|RD_3|SM,		0,		I1,		0,	0 },
  {"sw",			"t,A(b)",	0,    (int) M_SW_AB,	INSN_MACRO,		0,		I1,		0,	0 },
@@ -389,5 +389,5 @@ index 180d613c93..65b7b8cc23 100644
  {"swc0",		"E,A(b)",	0,    (int) M_SWC0_AB,	INSN_MACRO,		0,		I1,		0,	IOCT|IOCTP|IOCT2|I37 },
  {"swc1",		"T,o(b)",	0xe4000000, 0xfc000000,	RD_1|RD_3|SM|FP_S,	0,		I1,		0,	0 },
 -- 
-2.16.1
+2.18.0
 

meta/recipes-devtools/binutils/binutils/0013-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch

@@ -1,4 +1,4 @@
-From 27ec22ca3cd56cfdf060d2e1f414bedce269b322 Mon Sep 17 00:00:00 2001
+From d45455db35db5693c5efe0e1b384295e4c0db998 Mon Sep 17 00:00:00 2001
 From: Zhenhua Luo <zhenhua.luo@nxp.com>
 Date: Sat, 11 Jun 2016 22:08:29 -0500
 Subject: [PATCH 13/15] fix the incorrect assembling for ppc wait mnemonic
@@ -11,10 +11,10 @@ Upstream-Status: Pending
  1 file changed, 1 insertion(+), 2 deletions(-)
 
 diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
-index bb17f26c2e..dbdd762b4e 100644
+index 4a0fca5f0a..49f72fc35c 100644
 --- a/opcodes/ppc-opc.c
 +++ b/opcodes/ppc-opc.c
-@@ -5338,7 +5338,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
+@@ -5351,7 +5351,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
  {"ldepx",	X(31,29),	X_MASK,	  E500MC|PPCA2, 0,		{RT, RA0, RB}},
  
  {"waitasec",	X(31,30),      XRTRARB_MASK, POWER8,	POWER9,		{0}},
@@ -22,7 +22,7 @@ index bb17f26c2e..dbdd762b4e 100644
  
  {"lwepx",	X(31,31),	X_MASK,	  E500MC|PPCA2, 0,		{RT, RA0, RB}},
  
-@@ -5392,7 +5391,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
+@@ -5405,7 +5404,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
  
  {"waitrsv",	X(31,62)|(1<<21), 0xffffffff, E500MC|PPCA2, 0,		{0}},
  {"waitimpl",	X(31,62)|(2<<21), 0xffffffff, E500MC|PPCA2, 0,		{0}},
@@ -32,5 +32,5 @@ index bb17f26c2e..dbdd762b4e 100644
  {"dcbstep",	XRT(31,63,0),	XRT_MASK,    E500MC|PPCA2, 0,		{RA0, RB}},
  
 -- 
-2.16.1
+2.18.0
 

meta/recipes-devtools/binutils/binutils/0014-Detect-64-bit-MIPS-targets.patch

@@ -1,4 +1,4 @@
-From 7dfbd6889d868a09d695dd2736104848c1a9c9c3 Mon Sep 17 00:00:00 2001
+From 9af90cfc35ff1fe78755578861473039836c467a Mon Sep 17 00:00:00 2001
 From: Khem Raj <raj.khem@gmail.com>
 Date: Fri, 31 Mar 2017 11:42:03 -0700
 Subject: [PATCH 14/15] Detect 64-bit MIPS targets
@@ -46,5 +46,5 @@ index 8aef22a318..7030026ffa 100644
   targ_obj=mips
   targ_machine=EM_MIPS
 -- 
-2.16.1
+2.18.0
 

meta/recipes-devtools/binutils/binutils/0015-sync-with-OE-libtool-changes.patch

@@ -1,4 +1,4 @@
-From 298804f430939d6cc94b09732ee93e64c5e6be18 Mon Sep 17 00:00:00 2001
+From f9e26bd29b5f017ea1307b51b5036063bff78600 Mon Sep 17 00:00:00 2001
 From: Ross Burton <ross.burton@intel.com>
 Date: Mon, 6 Mar 2017 23:33:27 -0800
 Subject: [PATCH 15/15] sync with OE libtool changes
@@ -85,5 +85,5 @@ index 11ee684ccc..3b19ac1532 100644
  	elif test -n "$runpath_var"; then
  	  case "$finalize_perm_rpath " in
 -- 
-2.16.1
+2.18.0