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gcc-9.2: fix bug #91102 'aarch64 ICE on Linux kernel with -Os'
Linux kernel compilation for aarch64 triggers ICE if CONFIG_CC_OPTIMIZE_FOR_SIZE=y. The rootcause is GCC bug #91102 'aarch64 ICE on Linux kernel with -Os'. Apply the fix to 9.2. (From OE-Core rev: 14f34d32bfdaa752f5043e62750d2e7b92c4b419) (From OE-Core rev: 8ebd3b4ed4995f27c1568cf873067ce24b1998bd) Signed-off-by: Taras Kondratiuk <takondra@cisco.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org> Signed-off-by: Anuj Mittal <anuj.mittal@intel.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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Richard Purdie
parent
7435786516
commit
2b0ad2bcad
@@ -68,6 +68,7 @@ SRC_URI = "\
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file://CVE-2019-15847_1.patch \
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file://CVE-2019-15847_2.patch \
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file://CVE-2019-15847_3.patch \
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file://re-PR-target-91102-aarch64-ICE-on-Linux-kernel-with-.patch \
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"
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S = "${TMPDIR}/work-shared/gcc-${PV}-${PR}/gcc-${PV}"
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SRC_URI[md5sum] = "3818ad8600447f05349098232c2ddc78"
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@@ -0,0 +1,95 @@
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From efb0ee06f5c0186c2d1442ecd4dbbd55dbd97b44 Mon Sep 17 00:00:00 2001
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From: Vladimir Makarov <vmakarov@redhat.com>
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Date: Wed, 10 Jul 2019 16:07:10 +0000
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Subject: [PATCH] re PR target/91102 (aarch64 ICE on Linux kernel with -Os
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starting with r270266)
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2019-07-10 Vladimir Makarov <vmakarov@redhat.com>
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PR target/91102
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* lra-constraints.c (process_alt_operands): Don't match user
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defined regs only if they are early clobbers.
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2019-07-10 Vladimir Makarov <vmakarov@redhat.com>
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PR target/91102
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* gcc.target/aarch64/pr91102.c: New test.
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From-SVN: r273357
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Upstream-Status: Backport [https://github.com/gcc-mirror/gcc/commit/613caed2feb9cfc8158308670b59df3d031ec629]
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[takondra: dropped conflicting ChangeLog changes]
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Signed-off-by: Taras Kondratiuk <takondra@cisco.com>
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---
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gcc/lra-constraints.c | 17 ++++++++++----
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gcc/testsuite/gcc.target/aarch64/pr91102.c | 26 ++++++++++++++++++++++
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2 files changed, 39 insertions(+), 4 deletions(-)
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create mode 100644 gcc/testsuite/gcc.target/aarch64/pr91102.c
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diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
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index cf33da8013e4..6382dbf852b6 100644
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--- a/gcc/lra-constraints.c
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+++ b/gcc/lra-constraints.c
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@@ -2172,8 +2172,9 @@ process_alt_operands (int only_alternative)
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else
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{
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/* Operands don't match. If the operands are
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- different user defined explicit hard registers,
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- then we cannot make them match. */
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+ different user defined explicit hard
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+ registers, then we cannot make them match
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+ when one is early clobber operand. */
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if ((REG_P (*curr_id->operand_loc[nop])
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|| SUBREG_P (*curr_id->operand_loc[nop]))
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&& (REG_P (*curr_id->operand_loc[m])
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@@ -2192,9 +2193,17 @@ process_alt_operands (int only_alternative)
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&& REG_P (m_reg)
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&& HARD_REGISTER_P (m_reg)
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&& REG_USERVAR_P (m_reg))
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- break;
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+ {
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+ int i;
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+
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+ for (i = 0; i < early_clobbered_regs_num; i++)
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+ if (m == early_clobbered_nops[i])
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+ break;
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+ if (i < early_clobbered_regs_num
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+ || early_clobber_p)
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+ break;
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+ }
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}
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-
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/* Both operands must allow a reload register,
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otherwise we cannot make them match. */
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if (curr_alt[m] == NO_REGS)
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diff --git a/gcc/testsuite/gcc.target/aarch64/pr91102.c b/gcc/testsuite/gcc.target/aarch64/pr91102.c
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new file mode 100644
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index 000000000000..70b99045a48e
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/aarch64/pr91102.c
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@@ -0,0 +1,26 @@
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+/* PR target/91102 */
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+/* { dg-do compile } */
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+/* { dg-options "-O2" } */
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+
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+int
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+foo (long d, long l)
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+{
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+ register long e asm ("x1") = d;
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+ register long f asm("x2") = l;
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+ asm ("" : : "r" (e), "r" (f));
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+ return 3;
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+}
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+
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+struct T { int i; int j; };
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+union S { long h; struct T t; };
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+
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+void
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+bar (union S b)
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+{
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+ while (1)
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+ {
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+ union S c = b;
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+ c.t.j++;
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+ b.h = foo (b.h, c.h);
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+ }
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+}
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