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gcc: Fix internal compiler error for PPC test case "gcc.dg/vmx/7d-02.c"
Fix an internal compiler error on PPC from building a specific test:
$ $CC -S 7d-02.c
7d-02.c: In function â:
7d-02.c:11:5: internal compiler error: in copy_to_mode_reg, at explow.c:612
vec_st(v, i*16,p);
^~~~~~
The failure appears to happen on all optimizations levels as well.
(From OE-Core rev: b042347ee8cdbd2dfb0c2f616a94c4cca4b0ecd1)
Signed-off-by: Mark Hatle <mark.hatle@windriver.com>
Signed-off-by: Armin Kuster <akuster808@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
This commit is contained in:
committed by
Richard Purdie
parent
6c6c744457
commit
91870e9277
@@ -78,6 +78,7 @@ SRC_URI = "\
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${BACKPORTS} \
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"
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BACKPORTS = "\
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file://0001-Fix-internal-compiler-error-in-testcase.patch \
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"
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SRC_URI[md5sum] = "be2da21680f27624f3a87055c4ba5af2"
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@@ -0,0 +1,212 @@
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From d3cdd96a300f9003a1cc242541605169aacdc811 Mon Sep 17 00:00:00 2001
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From: willschm <willschm@138bc75d-0d04-0410-961f-82ee72b054a4>
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Date: Mon, 25 Sep 2017 14:35:02 +0000
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Subject: [PATCH] [gcc]
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2017-09-25 Will Schmidt <will_schmidt@vnet.ibm.com>
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* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling
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for early folding of vector stores (ALTIVEC_BUILTIN_ST_*).
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(rs6000_builtin_valid_without_lhs): New helper function.
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* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
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Remove obsoleted code for handling ALTIVEC_BUILTIN_VEC_ST.
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@253152 138bc75d-0d04-0410-961f-82ee72b054a4
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Fix internal compiler error for testcase gcc.dg/vmx/7d-02.c
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Upstream commit: d3cdd96a300f9003a1cc242541605169aacdc811
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Backport by Kaushik Phatak <Kaushik.Phatak@kpit.com>
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This patch removes changes to Changelog from the original upstream patch.
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This will help us avoid conflicts.
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Upstream-Status: Backport
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Signed-off-by: Mark Hatle <mark.hatle@windriver.com>
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---
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gcc/ChangeLog | 8 +++++
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gcc/config/rs6000/rs6000-c.c | 72 -------------------------------------------
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gcc/config/rs6000/rs6000.c | 73 ++++++++++++++++++++++++++++++++++++++++++--
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3 files changed, 78 insertions(+), 75 deletions(-)
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diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
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index a49db97..4a363a1 100644
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--- a/gcc/config/rs6000/rs6000-c.c
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+++ b/gcc/config/rs6000/rs6000-c.c
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@@ -6279,70 +6279,6 @@ altivec_resolve_overloaded_builtin (loca
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}
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}
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- /* Similarly for stvx. */
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- if (fcode == ALTIVEC_BUILTIN_VEC_ST
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- && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)
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- && nargs == 3)
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- {
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- tree arg0 = (*arglist)[0];
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- tree arg1 = (*arglist)[1];
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- tree arg2 = (*arglist)[2];
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-
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- /* Construct the masked address. Let existing error handling take
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- over if we don't have a constant offset. */
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- arg1 = fold (arg1);
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-
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- if (TREE_CODE (arg1) == INTEGER_CST)
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- {
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- if (!ptrofftype_p (TREE_TYPE (arg1)))
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- arg1 = build1 (NOP_EXPR, sizetype, arg1);
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-
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- tree arg2_type = TREE_TYPE (arg2);
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- if (TREE_CODE (arg2_type) == ARRAY_TYPE && c_dialect_cxx ())
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- {
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- /* Force array-to-pointer decay for C++. */
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- arg2 = default_conversion (arg2);
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- arg2_type = TREE_TYPE (arg2);
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- }
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-
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- /* Find the built-in to make sure a compatible one exists; if not
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- we fall back to default handling to get the error message. */
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- for (desc = altivec_overloaded_builtins;
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- desc->code && desc->code != fcode; desc++)
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- continue;
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-
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- for (; desc->code == fcode; desc++)
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- if (rs6000_builtin_type_compatible (TREE_TYPE (arg0), desc->op1)
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- && rs6000_builtin_type_compatible (TREE_TYPE (arg1), desc->op2)
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- && rs6000_builtin_type_compatible (TREE_TYPE (arg2),
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- desc->op3))
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- {
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- tree addr = fold_build2_loc (loc, POINTER_PLUS_EXPR, arg2_type,
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- arg2, arg1);
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- tree aligned
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- = fold_build2_loc (loc, BIT_AND_EXPR, arg2_type,
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- addr, build_int_cst (arg2_type, -16));
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-
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- tree arg0_type = TREE_TYPE (arg0);
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- if (TYPE_MODE (arg0_type) == V2DImode)
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- /* Type-based aliasing analysis thinks vector long
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- and vector long long are different and will put them
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- in distinct alias classes. Force our address type
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- to be a may-alias type to avoid this. */
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- arg0_type
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- = build_pointer_type_for_mode (arg0_type, Pmode,
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- true/*can_alias_all*/);
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- else
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- arg0_type = build_pointer_type (arg0_type);
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- aligned = build1 (NOP_EXPR, arg0_type, aligned);
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- tree stg = build_indirect_ref (loc, aligned, RO_NULL);
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- tree retval = build2 (MODIFY_EXPR, TREE_TYPE (stg), stg,
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- convert (TREE_TYPE (stg), arg0));
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- return retval;
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- }
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- }
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- }
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-
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for (n = 0;
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!VOID_TYPE_P (TREE_VALUE (fnargs)) && n < nargs;
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fnargs = TREE_CHAIN (fnargs), n++)
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diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
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index a49db97..4a363a1 100644
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--- a/gcc/config/rs6000/rs6000.c
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+++ b/gcc/config/rs6000/rs6000.c
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@@ -55,6 +55,7 @@
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#include "reload.h"
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#include "sched-int.h"
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#include "gimplify.h"
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+#include "gimple-fold.h"
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#include "gimple-iterator.h"
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#include "gimple-ssa.h"
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#include "gimple-walk.h"
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@@ -17089,6 +17090,25 @@ rs6000_fold_builtin (tree fndecl, int n_
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#endif
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}
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+/* Helper function to sort out which built-ins may be valid without having
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+ a LHS. */
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+bool
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+rs6000_builtin_valid_without_lhs (enum rs6000_builtins fn_code)
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+{
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+ switch (fn_code)
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+ {
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+ case ALTIVEC_BUILTIN_STVX_V16QI:
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+ case ALTIVEC_BUILTIN_STVX_V8HI:
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+ case ALTIVEC_BUILTIN_STVX_V4SI:
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+ case ALTIVEC_BUILTIN_STVX_V4SF:
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+ case ALTIVEC_BUILTIN_STVX_V2DI:
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+ case ALTIVEC_BUILTIN_STVX_V2DF:
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+ return true;
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+ default:
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+ return false;
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+ }
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+}
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+
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/* Fold a machine-dependent built-in in GIMPLE. (For folding into
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a constant, use rs6000_fold_builtin.) */
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@@ -17102,6 +17122,10 @@ rs6000_gimple_fold_builtin (gimple_stmt_
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= (enum rs6000_builtins) DECL_FUNCTION_CODE (fndecl);
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tree arg0, arg1, lhs;
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+ /* Prevent gimple folding for code that does not have a LHS, unless it is
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+ allowed per the rs6000_builtin_valid_without_lhs helper function. */
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+ if (!gimple_call_lhs (stmt) && !rs6000_builtin_valid_without_lhs (fn_code))
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+ return false;
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switch (fn_code)
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{
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/* Flavors of vec_add. We deliberately don't expand
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@@ -17169,6 +17193,54 @@ rs6000_gimple_fold_builtin (gimple_stmt_
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gsi_replace (gsi, g, true);
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return true;
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}
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+ /* Vector stores. */
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+ case ALTIVEC_BUILTIN_STVX_V16QI:
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+ case ALTIVEC_BUILTIN_STVX_V8HI:
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+ case ALTIVEC_BUILTIN_STVX_V4SI:
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+ case ALTIVEC_BUILTIN_STVX_V4SF:
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+ case ALTIVEC_BUILTIN_STVX_V2DI:
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+ case ALTIVEC_BUILTIN_STVX_V2DF:
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+ {
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+ /* Do not fold for -maltivec=be on LE targets. */
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+ if (VECTOR_ELT_ORDER_BIG && !BYTES_BIG_ENDIAN)
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+ return false;
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+ arg0 = gimple_call_arg (stmt, 0); /* Value to be stored. */
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+ arg1 = gimple_call_arg (stmt, 1); /* Offset. */
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+ tree arg2 = gimple_call_arg (stmt, 2); /* Store-to address. */
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+ location_t loc = gimple_location (stmt);
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+ tree arg0_type = TREE_TYPE (arg0);
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+ /* Use ptr_type_node (no TBAA) for the arg2_type.
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+ FIXME: (Richard) "A proper fix would be to transition this type as
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+ seen from the frontend to GIMPLE, for example in a similar way we
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+ do for MEM_REFs by piggy-backing that on an extra argument, a
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+ constant zero pointer of the alias pointer type to use (which would
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+ also serve as a type indicator of the store itself). I'd use a
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+ target specific internal function for this (not sure if we can have
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+ those target specific, but I guess if it's folded away then that's
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+ fine) and get away with the overload set."
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+ */
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+ tree arg2_type = ptr_type_node;
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+ /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create
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+ the tree using the value from arg0. The resulting type will match
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+ the type of arg2. */
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+ gimple_seq stmts = NULL;
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+ tree temp_offset = gimple_convert (&stmts, loc, sizetype, arg1);
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+ tree temp_addr = gimple_build (&stmts, loc, POINTER_PLUS_EXPR,
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+ arg2_type, arg2, temp_offset);
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+ /* Mask off any lower bits from the address. */
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+ tree aligned_addr = gimple_build (&stmts, loc, BIT_AND_EXPR,
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+ arg2_type, temp_addr,
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+ build_int_cst (arg2_type, -16));
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+ gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);
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+ /* The desired gimple result should be similar to:
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+ MEM[(__vector floatD.1407 *)_1] = vf1D.2697; */
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+ gimple *g;
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+ g = gimple_build_assign (build2 (MEM_REF, arg0_type, aligned_addr,
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+ build_int_cst (arg2_type, 0)), arg0);
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+ gimple_set_location (g, loc);
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+ gsi_replace (gsi, g, true);
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+ return true;
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+ }
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default:
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break;
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