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gcc: Upgrade 4.9.1 -> 4.9.2
Delete backported patch which are present in 4.9.2 backport patched from upstream gcc trunk to fix [YOCTO #6824] Change-Id: Ia0067940471d4c5d9d62089bf6f18f3a9c2bfedd (From OE-Core rev: bdd8d7db74ad6927cd54f38c3e87246a36b2c319) Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
This commit is contained in:
Khem Raj
@@ -2,11 +2,11 @@ require gcc-common.inc
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# Third digit in PV should be incremented after a minor release
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PV = "4.9.1"
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PV = "4.9.2"
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# BINV should be incremented to a revision after a minor gcc release
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BINV = "4.9.1"
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BINV = "4.9.2"
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FILESEXTRAPATHS =. "${FILE_DIRNAME}/gcc-4.9:"
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@@ -67,17 +67,19 @@ SRC_URI = "\
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file://0049-Enable-SPE-AltiVec-generation-on-powepc-linux-target.patch \
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file://0050-Revert-Use-dbx_reg_number-for-spanning-registers.patch \
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file://0051-eabispe.patch \
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file://0052-Add-target-hook-to-override-DWARF2-frame-register-si.patch \
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file://0053-gcc-fix-segfault-from-calling-free-on-non-malloc-d-a.patch \
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file://0054-gcc-Makefile.in-fix-parallel-building-failure.patch \
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file://0055-PR-rtl-optimization-61801.patch \
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file://0056-top-level-reorder_gcc-bug-61144.patch \
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file://0055-dwarf-reg-processing-helper.patch \
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file://0056-define-default-cfa-register-mapping.patch \
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file://0057-aarch64-config.patch \
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file://0058-gcc-r212171.patch \
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file://0059-gcc-PR-rtl-optimization-63348.patch \
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file://target-gcc-includedir.patch \
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file://0060-Only-allow-e500-double-in-SPE_SIMD_REGNO_P-registers.patch \
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file://0061-target-gcc-includedir.patch \
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"
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SRC_URI[md5sum] = "fddf71348546af523353bd43d34919c1"
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SRC_URI[sha256sum] = "d334781a124ada6f38e63b545e2a3b8c2183049515a1abab6d513f109f1d717e"
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SRC_URI[md5sum] = "4df8ee253b7f3863ad0b86359cd39c43"
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SRC_URI[sha256sum] = "2020c98295856aa13fda0f2f3a4794490757fc24bcca918d52cc8b4917b972dd"
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S = "${TMPDIR}/work-shared/gcc-${PV}-${PR}/gcc-${PV}"
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B = "${WORKDIR}/gcc-${PV}/build.${HOST_SYS}.${TARGET_SYS}"
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@@ -125,10 +127,8 @@ EXTRA_OECONF_INTERMEDIATE = "\
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EXTRA_OECONF_append_libc-uclibc = " --disable-decimal-float "
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EXTRA_OECONF_PATHS = "\
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--with-gxx-include-dir=/not/exist{target_includedir}/c++/${BINV} \
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--with-sysroot=/not/exist \
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EXTRA_OECONF_PATHS = "\
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--with-gxx-include-dir=/not/exist{target_includedir}/c++/${BINV} \
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--with-sysroot=/not/exist \
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--with-build-sysroot=${STAGING_DIR_TARGET} \
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"
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@@ -0,0 +1,138 @@
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From d626297e87e19251a284ea1e9360e831b48999ca Mon Sep 17 00:00:00 2001
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From: mpf <mpf@138bc75d-0d04-0410-961f-82ee72b054a4>
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Date: Thu, 4 Sep 2014 08:32:05 +0000
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Subject: [PATCH] Add target hook to override DWARF2 frame register size
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gcc/
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* target.def (TARGET_DWARF_FRAME_REG_MODE): New target hook.
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* targhooks.c (default_dwarf_frame_reg_mode): New function.
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* targhooks.h (default_dwarf_frame_reg_mode): New prototype.
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* doc/tm.texi.in (TARGET_DWARF_FRAME_REG_MODE): Document.
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* doc/tm.texi: Regenerate.
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* dwarf2cfi.c (expand_builtin_init_dwarf_reg_sizes): Abstract mode
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selection logic to default_dwarf_frame_reg_mode.
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@214898 138bc75d-0d04-0410-961f-82ee72b054a4
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Signed-off-by: Khem Raj <raj.khem@gmail.com>
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Upstream-Status: Backport [gcc 5.0]
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---
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gcc/ChangeLog | 10 ++++++++++
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gcc/doc/tm.texi | 7 +++++++
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gcc/doc/tm.texi.in | 2 ++
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gcc/dwarf2cfi.c | 4 +---
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gcc/target.def | 11 +++++++++++
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gcc/targhooks.c | 13 +++++++++++++
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gcc/targhooks.h | 1 +
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7 files changed, 45 insertions(+), 3 deletions(-)
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Index: gcc-4.9.2/gcc/doc/tm.texi
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===================================================================
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--- gcc-4.9.2.orig/gcc/doc/tm.texi
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+++ gcc-4.9.2/gcc/doc/tm.texi
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@@ -9017,6 +9017,13 @@ register in Dwarf. Otherwise, this hook
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If not defined, the default is to return @code{NULL_RTX}.
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@end deftypefn
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+@deftypefn {Target Hook} {enum machine_mode} TARGET_DWARF_FRAME_REG_MODE (int @var{regno})
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+Given a register, this hook should return the mode which the
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+corresponding Dwarf frame register should have. This is normally
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+used to return a smaller mode than the raw mode to prevent call
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+clobbered parts of a register altering the frame register size
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+@end deftypefn
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+
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@deftypefn {Target Hook} void TARGET_INIT_DWARF_REG_SIZES_EXTRA (tree @var{address})
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If some registers are represented in Dwarf-2 unwind information in
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multiple pieces, define this hook to fill in information about the
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Index: gcc-4.9.2/gcc/doc/tm.texi.in
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===================================================================
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--- gcc-4.9.2.orig/gcc/doc/tm.texi.in
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+++ gcc-4.9.2/gcc/doc/tm.texi.in
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@@ -6745,6 +6745,8 @@ the target supports DWARF 2 frame unwind
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@hook TARGET_DWARF_REGISTER_SPAN
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+@hook TARGET_DWARF_FRAME_REG_MODE
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+
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@hook TARGET_INIT_DWARF_REG_SIZES_EXTRA
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@hook TARGET_ASM_TTYPE
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Index: gcc-4.9.2/gcc/dwarf2cfi.c
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===================================================================
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--- gcc-4.9.2.orig/gcc/dwarf2cfi.c
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+++ gcc-4.9.2/gcc/dwarf2cfi.c
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@@ -271,11 +271,9 @@ expand_builtin_init_dwarf_reg_sizes (tre
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if (rnum < DWARF_FRAME_REGISTERS)
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{
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HOST_WIDE_INT offset = rnum * GET_MODE_SIZE (mode);
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- enum machine_mode save_mode = reg_raw_mode[i];
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HOST_WIDE_INT size;
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+ enum machine_mode save_mode = targetm.dwarf_frame_reg_mode (i);
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- if (HARD_REGNO_CALL_PART_CLOBBERED (i, save_mode))
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- save_mode = choose_hard_reg_mode (i, 1, true);
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if (dnum == DWARF_FRAME_RETURN_COLUMN)
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{
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if (save_mode == VOIDmode)
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Index: gcc-4.9.2/gcc/target.def
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===================================================================
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--- gcc-4.9.2.orig/gcc/target.def
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+++ gcc-4.9.2/gcc/target.def
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@@ -3218,6 +3218,17 @@ If not defined, the default is to return
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rtx, (rtx reg),
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hook_rtx_rtx_null)
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+/* Given a register return the mode of the corresponding DWARF frame
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+ register. */
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+DEFHOOK
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+(dwarf_frame_reg_mode,
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+ "Given a register, this hook should return the mode which the\n\
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+corresponding Dwarf frame register should have. This is normally\n\
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+used to return a smaller mode than the raw mode to prevent call\n\
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+clobbered parts of a register altering the frame register size",
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+ enum machine_mode, (int regno),
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+ default_dwarf_frame_reg_mode)
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+
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/* If expand_builtin_init_dwarf_reg_sizes needs to fill in table
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entries not corresponding directly to registers below
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FIRST_PSEUDO_REGISTER, this hook should generate the necessary
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Index: gcc-4.9.2/gcc/targhooks.c
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===================================================================
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--- gcc-4.9.2.orig/gcc/targhooks.c
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+++ gcc-4.9.2/gcc/targhooks.c
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@@ -1438,6 +1438,19 @@ default_debug_unwind_info (void)
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return UI_NONE;
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}
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+/* Determine the correct mode for a Dwarf frame register that represents
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+ register REGNO. */
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+
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+enum machine_mode
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+default_dwarf_frame_reg_mode (int regno)
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+{
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+ enum machine_mode save_mode = reg_raw_mode[regno];
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+
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+ if (HARD_REGNO_CALL_PART_CLOBBERED (regno, save_mode))
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+ save_mode = choose_hard_reg_mode (regno, 1, true);
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+ return save_mode;
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+}
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+
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/* To be used by targets where reg_raw_mode doesn't return the right
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mode for registers used in apply_builtin_return and apply_builtin_arg. */
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Index: gcc-4.9.2/gcc/targhooks.h
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===================================================================
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--- gcc-4.9.2.orig/gcc/targhooks.h
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+++ gcc-4.9.2/gcc/targhooks.h
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@@ -194,6 +194,7 @@ extern int default_label_align_max_skip
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extern int default_jump_align_max_skip (rtx);
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extern section * default_function_section(tree decl, enum node_frequency freq,
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bool startup, bool exit);
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+extern enum machine_mode default_dwarf_frame_reg_mode (int);
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extern enum machine_mode default_get_reg_raw_mode (int);
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extern void *default_get_pch_validity (size_t *);
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@@ -1,36 +0,0 @@
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From 556537c4ad0df4cbebb74197bb2bdea75cf5dd35 Mon Sep 17 00:00:00 2001
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From: rguenth <rguenth@138bc75d-0d04-0410-961f-82ee72b054a4>
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Date: Thu, 17 Jul 2014 07:48:49 +0000
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Subject: [PATCH] 2014-07-17 Richard Biener <rguenther@suse.de>
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PR rtl-optimization/61801
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* sched-deps.c (sched_analyze_2): For ASM_OPERANDS and
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ASM_INPUT don't set reg_pending_barrier if it appears in a
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debug-insn.
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@212739 138bc75d-0d04-0410-961f-82ee72b054a4
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Upstream-Status: Backport [https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61801]
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Signed-off-by: Peter A. Bigot <pab@pabigot.com>
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---
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gcc/sched-deps.c | 3 ++-
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diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c
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index efc4223..df29bd3 100644
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--- a/gcc/sched-deps.c
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+++ b/gcc/sched-deps.c
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@@ -2750,7 +2750,8 @@ sched_analyze_2 (struct deps_desc *deps, rtx x, rtx insn)
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Consider for instance a volatile asm that changes the fpu rounding
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mode. An insn should not be moved across this even if it only uses
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pseudo-regs because it might give an incorrectly rounded result. */
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- if (code != ASM_OPERANDS || MEM_VOLATILE_P (x))
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+ if ((code != ASM_OPERANDS || MEM_VOLATILE_P (x))
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+ && !DEBUG_INSN_P (insn))
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reg_pending_barrier = TRUE_BARRIER;
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/* For all ASM_OPERANDS, we must traverse the vector of input operands.
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--
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1.8.5.5
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@@ -0,0 +1,148 @@
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From 4fd39f1329379e00f958394adde6be96f0caf21f Mon Sep 17 00:00:00 2001
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From: hainque <hainque@138bc75d-0d04-0410-961f-82ee72b054a4>
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Date: Fri, 5 Dec 2014 16:53:22 +0000
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Subject: [PATCH] 2014-12-05 Olivier Hainque <hainque@adacore.com>
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* dwarf2cfi.c (init_one_dwarf_reg_size): New helper, processing
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one particular reg for expand_builtin_init_dwarf_reg_sizes.
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(expand_builtin_init_dwarf_reg_sizes): Rework to use helper and
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account for dwarf register spans.
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@218428 138bc75d-0d04-0410-961f-82ee72b054a4
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Signed-off-by: Khem Raj <raj.khem@gmail.com>
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Upstream-Status: Backport [gcc 5.0]
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---
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gcc/ChangeLog | 7 +++++
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gcc/dwarf2cfi.c | 98 +++++++++++++++++++++++++++++++++++++++++++++------------
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2 files changed, 85 insertions(+), 20 deletions(-)
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Index: gcc-4.9.2/gcc/dwarf2cfi.c
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===================================================================
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--- gcc-4.9.2.orig/gcc/dwarf2cfi.c
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+++ gcc-4.9.2/gcc/dwarf2cfi.c
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@@ -252,7 +252,59 @@ init_return_column_size (enum machine_mo
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gen_int_mode (size, mode));
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}
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-/* Generate code to initialize the register size table. */
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+/* Datastructure used by expand_builtin_init_dwarf_reg_sizes and
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+ init_one_dwarf_reg_size to communicate on what has been done by the
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+ latter. */
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+
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+typedef struct
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+{
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+ /* Whether the dwarf return column was initialized. */
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+ bool wrote_return_column;
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+
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+ /* For each hard register REGNO, whether init_one_dwarf_reg_size
|
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+ was given REGNO to process already. */
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+ bool processed_regno [FIRST_PSEUDO_REGISTER];
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+
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+} init_one_dwarf_reg_state;
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+
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+/* Helper for expand_builtin_init_dwarf_reg_sizes. Generate code to
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+ initialize the dwarf register size table entry corresponding to register
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+ REGNO in REGMODE. TABLE is the table base address, SLOTMODE is the mode to
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+ use for the size entry to initialize, and INIT_STATE is the communication
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+ datastructure conveying what we're doing to our caller. */
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+
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+static
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+void init_one_dwarf_reg_size (int regno, machine_mode regmode,
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+ rtx table, machine_mode slotmode,
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+ init_one_dwarf_reg_state *init_state)
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+{
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+ const unsigned int dnum = DWARF_FRAME_REGNUM (regno);
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+ const unsigned int rnum = DWARF2_FRAME_REG_OUT (dnum, 1);
|
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+
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+ const HOST_WIDE_INT slotoffset = rnum * GET_MODE_SIZE (slotmode);
|
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+ const HOST_WIDE_INT regsize = GET_MODE_SIZE (regmode);
|
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+
|
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+ init_state->processed_regno[regno] = true;
|
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+
|
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+ if (rnum >= DWARF_FRAME_REGISTERS)
|
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+ return;
|
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+
|
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+ if (dnum == DWARF_FRAME_RETURN_COLUMN)
|
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+ {
|
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+ if (regmode == VOIDmode)
|
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+ return;
|
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+ init_state->wrote_return_column = true;
|
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+ }
|
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+
|
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+ if (slotoffset < 0)
|
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+ return;
|
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+
|
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+ emit_move_insn (adjust_address (table, slotmode, slotoffset),
|
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+ gen_int_mode (regsize, slotmode));
|
||||
+}
|
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+
|
||||
+/* Generate code to initialize the dwarf register size table located
|
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+ at the provided ADDRESS. */
|
||||
|
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void
|
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expand_builtin_init_dwarf_reg_sizes (tree address)
|
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@@ -261,35 +313,40 @@ expand_builtin_init_dwarf_reg_sizes (tre
|
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enum machine_mode mode = TYPE_MODE (char_type_node);
|
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rtx addr = expand_normal (address);
|
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rtx mem = gen_rtx_MEM (BLKmode, addr);
|
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- bool wrote_return_column = false;
|
||||
+
|
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+ init_one_dwarf_reg_state init_state;
|
||||
+
|
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+ memset ((char *)&init_state, 0, sizeof (init_state));
|
||||
|
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
|
||||
{
|
||||
- unsigned int dnum = DWARF_FRAME_REGNUM (i);
|
||||
- unsigned int rnum = DWARF2_FRAME_REG_OUT (dnum, 1);
|
||||
-
|
||||
- if (rnum < DWARF_FRAME_REGISTERS)
|
||||
- {
|
||||
- HOST_WIDE_INT offset = rnum * GET_MODE_SIZE (mode);
|
||||
- HOST_WIDE_INT size;
|
||||
- enum machine_mode save_mode = targetm.dwarf_frame_reg_mode (i);
|
||||
+ machine_mode save_mode;
|
||||
+ rtx span;
|
||||
|
||||
- if (dnum == DWARF_FRAME_RETURN_COLUMN)
|
||||
+ /* No point in processing a register multiple times. This could happen
|
||||
+ with register spans, e.g. when a reg is first processed as a piece of
|
||||
+ a span, then as a register on its own later on. */
|
||||
+
|
||||
+ if (init_state.processed_regno[i])
|
||||
+ continue;
|
||||
+
|
||||
+ save_mode = targetm.dwarf_frame_reg_mode (i);
|
||||
+ span = targetm.dwarf_register_span (gen_rtx_REG (save_mode, i));
|
||||
+ if (!span)
|
||||
+ init_one_dwarf_reg_size (i, save_mode, mem, mode, &init_state);
|
||||
+ else
|
||||
+ {
|
||||
+ for (int si = 0; si < XVECLEN (span, 0); si++)
|
||||
{
|
||||
- if (save_mode == VOIDmode)
|
||||
- continue;
|
||||
- wrote_return_column = true;
|
||||
- }
|
||||
- size = GET_MODE_SIZE (save_mode);
|
||||
- if (offset < 0)
|
||||
- continue;
|
||||
+ rtx reg = XVECEXP (span, 0, si);
|
||||
+ init_one_dwarf_reg_size
|
||||
+ (REGNO (reg), GET_MODE (reg), mem, mode, &init_state);
|
||||
+ }
|
||||
|
||||
- emit_move_insn (adjust_address (mem, mode, offset),
|
||||
- gen_int_mode (size, mode));
|
||||
}
|
||||
}
|
||||
|
||||
- if (!wrote_return_column)
|
||||
+ if (!init_state.wrote_return_column)
|
||||
init_return_column_size (mode, mem, DWARF_FRAME_RETURN_COLUMN);
|
||||
|
||||
#ifdef DWARF_ALT_FRAME_RETURN_COLUMN
|
||||
@@ -0,0 +1,75 @@
|
||||
From c0235a33de8c4f78cce35b2a8c2035c83fe1bd14 Mon Sep 17 00:00:00 2001
|
||||
From: hainque <hainque@138bc75d-0d04-0410-961f-82ee72b054a4>
|
||||
Date: Fri, 5 Dec 2014 17:01:42 +0000
|
||||
Subject: [PATCH] 2014-12-05 Olivier Hainque <hainque@adacore.com>
|
||||
|
||||
gcc/
|
||||
* defaults.h: (DWARF_REG_TO_UNWIND_COLUMN): Define default.
|
||||
* dwarf2cfi.c (init_one_dwarf_reg_size): Honor
|
||||
DWARF_REG_TO_UNWIND_COLUMN.
|
||||
|
||||
libgcc/
|
||||
* unwind-dw2.c (DWARF_REG_TO_UNWIND_COLUMN): Remove default def,
|
||||
now provided by defaults.h.
|
||||
|
||||
|
||||
|
||||
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@218429 138bc75d-0d04-0410-961f-82ee72b054a4
|
||||
|
||||
Signed-off-by: Khem Raj <raj.khem@gmail.com>
|
||||
Upstream-Status: Backport [gcc 5.0]
|
||||
|
||||
---
|
||||
gcc/ChangeLog | 6 ++++++
|
||||
gcc/defaults.h | 5 +++++
|
||||
gcc/dwarf2cfi.c | 3 ++-
|
||||
libgcc/ChangeLog | 5 +++++
|
||||
libgcc/unwind-dw2.c | 4 ----
|
||||
5 files changed, 18 insertions(+), 5 deletions(-)
|
||||
|
||||
Index: gcc-4.9.2/gcc/defaults.h
|
||||
===================================================================
|
||||
--- gcc-4.9.2.orig/gcc/defaults.h
|
||||
+++ gcc-4.9.2/gcc/defaults.h
|
||||
@@ -438,6 +438,11 @@ see the files COPYING3 and COPYING.RUNTI
|
||||
#define DWARF_FRAME_REGNUM(REG) DBX_REGISTER_NUMBER (REG)
|
||||
#endif
|
||||
|
||||
+/* The mapping from dwarf CFA reg number to internal dwarf reg numbers. */
|
||||
+#ifndef DWARF_REG_TO_UNWIND_COLUMN
|
||||
+#define DWARF_REG_TO_UNWIND_COLUMN(REGNO) (REGNO)
|
||||
+#endif
|
||||
+
|
||||
/* Map register numbers held in the call frame info that gcc has
|
||||
collected using DWARF_FRAME_REGNUM to those that should be output in
|
||||
.debug_frame and .eh_frame. */
|
||||
Index: gcc-4.9.2/gcc/dwarf2cfi.c
|
||||
===================================================================
|
||||
--- gcc-4.9.2.orig/gcc/dwarf2cfi.c
|
||||
+++ gcc-4.9.2/gcc/dwarf2cfi.c
|
||||
@@ -280,8 +280,9 @@ void init_one_dwarf_reg_size (int regno,
|
||||
{
|
||||
const unsigned int dnum = DWARF_FRAME_REGNUM (regno);
|
||||
const unsigned int rnum = DWARF2_FRAME_REG_OUT (dnum, 1);
|
||||
+ const unsigned int dcol = DWARF_REG_TO_UNWIND_COLUMN (rnum);
|
||||
|
||||
- const HOST_WIDE_INT slotoffset = rnum * GET_MODE_SIZE (slotmode);
|
||||
+ const HOST_WIDE_INT slotoffset = dcol * GET_MODE_SIZE (slotmode);
|
||||
const HOST_WIDE_INT regsize = GET_MODE_SIZE (regmode);
|
||||
|
||||
init_state->processed_regno[regno] = true;
|
||||
Index: gcc-4.9.2/libgcc/unwind-dw2.c
|
||||
===================================================================
|
||||
--- gcc-4.9.2.orig/libgcc/unwind-dw2.c
|
||||
+++ gcc-4.9.2/libgcc/unwind-dw2.c
|
||||
@@ -55,10 +55,6 @@
|
||||
#define PRE_GCC3_DWARF_FRAME_REGISTERS DWARF_FRAME_REGISTERS
|
||||
#endif
|
||||
|
||||
-#ifndef DWARF_REG_TO_UNWIND_COLUMN
|
||||
-#define DWARF_REG_TO_UNWIND_COLUMN(REGNO) (REGNO)
|
||||
-#endif
|
||||
-
|
||||
/* ??? For the public function interfaces, we tend to gcc_assert that the
|
||||
column numbers are in range. For the dwarf2 unwind info this does happen,
|
||||
although so far in a case that doesn't actually matter.
|
||||
@@ -1,31 +0,0 @@
|
||||
|
||||
Upstream-Status: Backport
|
||||
|
||||
Originally-submitted-by: Peter Urbanec <openembedded-devel@urbanec.net>
|
||||
Signed-off-by: Saul Wold <sgw@linux.intel.com>
|
||||
|
||||
--- /dev/null
|
||||
+++ b/meta/recipes-devtools/gcc/gcc-4.9/0056-top-level-reorder_gcc-bug-61144.patch
|
||||
@@ -0,0 +1,21 @@
|
||||
+--- a/gcc/varpool.c 2014/10/05 02:50:01 215895
|
||||
++++ b/gcc/varpool.c 2014/10/05 04:52:19 215896
|
||||
+@@ -329,8 +329,16 @@
|
||||
+
|
||||
+ /* Variables declared 'const' without an initializer
|
||||
+ have zero as the initializer if they may not be
|
||||
+- overridden at link or run time. */
|
||||
+- if (!DECL_INITIAL (real_decl)
|
||||
++ overridden at link or run time.
|
||||
++
|
||||
++ It is actually requirement for C++ compiler to optimize const variables
|
||||
++ consistently. As a GNU extension, do not enfore this rule for user defined
|
||||
++ weak variables, so we support interposition on:
|
||||
++ static const int dummy = 0;
|
||||
++ extern const int foo __attribute__((__weak__, __alias__("dummy")));
|
||||
++ */
|
||||
++ if ((!DECL_INITIAL (real_decl)
|
||||
++ || (DECL_WEAK (decl) && !DECL_COMDAT (decl)))
|
||||
+ && (DECL_EXTERNAL (decl) || decl_replaceable_p (decl)))
|
||||
+ return error_mark_node;
|
||||
+
|
||||
|
||||
@@ -0,0 +1,55 @@
|
||||
From 5c0092070253113cf0d9c45eacc884b3ecc34d81 Mon Sep 17 00:00:00 2001
|
||||
From: jsm28 <jsm28@138bc75d-0d04-0410-961f-82ee72b054a4>
|
||||
Date: Sat, 25 Oct 2014 00:23:17 +0000
|
||||
Subject: [PATCH] Only allow e500 double in SPE_SIMD_REGNO_P registers.
|
||||
|
||||
rs6000_hard_regno_nregs_internal allows SPE vectors in single
|
||||
registers satisfying SPE_SIMD_REGNO_P (i.e. register numbers 0 to
|
||||
31). However, the corresponding test for e500 double treats all
|
||||
registers as being able to store a 64-bit value, rather than just
|
||||
those GPRs.
|
||||
|
||||
Logically this inconsistency is wrong; in addition, it causes problems
|
||||
unwinding from signal handlers. linux-unwind.h uses
|
||||
ARG_POINTER_REGNUM as a place to store the return address from a
|
||||
signal handler, but this logic in rs6000_hard_regno_nregs_internal
|
||||
results in that being considered an 8-byte register, resulting in
|
||||
assertion failures.
|
||||
(<https://gcc.gnu.org/ml/gcc-patches/2014-09/msg02625.html> first
|
||||
needs to be applied for unwinding to work in general on e500.) This
|
||||
patch makes rs6000_hard_regno_nregs_internal handle the e500 double
|
||||
case consistently with SPE vectors.
|
||||
|
||||
Tested with no regressions with cross to powerpc-linux-gnuspe (given
|
||||
the aforementioned patch applied). Failures of signal handling
|
||||
unwinding tests such as gcc.dg/cleanup-{8,9,10,11}.c are fixed by this
|
||||
patch.
|
||||
|
||||
* config/rs6000/rs6000.c (rs6000_hard_regno_nregs_internal): Do
|
||||
not allow e500 double in registers not satisyfing
|
||||
SPE_SIMD_REGNO_P.
|
||||
|
||||
|
||||
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@216688 138bc75d-0d04-0410-961f-82ee72b054a4
|
||||
|
||||
Signed-off-by: Khem Raj <raj.khem@gmail.com>
|
||||
Upstream-Status: Backport [gcc 5.0]
|
||||
|
||||
---
|
||||
gcc/ChangeLog | 6 ++++++
|
||||
gcc/config/rs6000/rs6000.c | 2 +-
|
||||
2 files changed, 7 insertions(+), 1 deletion(-)
|
||||
|
||||
Index: gcc-4.9.2/gcc/config/rs6000/rs6000.c
|
||||
===================================================================
|
||||
--- gcc-4.9.2.orig/gcc/config/rs6000/rs6000.c
|
||||
+++ gcc-4.9.2/gcc/config/rs6000/rs6000.c
|
||||
@@ -1703,7 +1703,7 @@ rs6000_hard_regno_nregs_internal (int re
|
||||
SCmode so as to pass the value correctly in a pair of
|
||||
registers. */
|
||||
else if (TARGET_E500_DOUBLE && FLOAT_MODE_P (mode) && mode != SCmode
|
||||
- && !DECIMAL_FLOAT_MODE_P (mode))
|
||||
+ && !DECIMAL_FLOAT_MODE_P (mode) && SPE_SIMD_REGNO_P (regno))
|
||||
reg_size = UNITS_PER_FP_WORD;
|
||||
|
||||
else
|
||||
Reference in New Issue
Block a user