tcl: fix from missing sys/fpu.h and undefined mipsCR

Signed-off-by: Saul Wold <Saul.Wold@intel.com>

meta/recipes-devtools/tcltk/tcl/mips-tclstrtod.patch

@@ -0,0 +1,28 @@
+http://sourceforge.net/tracker/index.php?func=detail&aid=2902010&group_id=10894&atid=110894
+
+Pulled from OE by: Saul Wold <saul.wold@intel.com>
+
+--- ../generic/tclStrToD.c.orig
++++ ../generic/tclStrToD.c
+@@ -71,9 +71,10 @@
+ 
+ /*
+  * MIPS floating-point units need special settings in control registers
+- * to use gradual underflow as we expect.
++ * to use gradual underflow as we expect.  This fix is for the MIPSpro
++ * compiler.  
+  */
+-#if defined(__mips)
++#if defined(__sgi) && defined(_COMPILER_VERSION)
+ #include <sys/fpu.h>
+ #endif
+ /*
+@@ -2166,7 +2167,7 @@
+     } bitwhack;
+ #endif
+ 
+-#if defined(__mips)
++#if defined(__sgi) && defined(_COMPILER_VERSION)
+     union fpc_csr mipsCR;
+ 
+     mipsCR.fc_word = get_fpc_csr();

meta/recipes-devtools/tcltk/tcl_8.5.8.bb

@@ -11,13 +11,14 @@ LIC_CHKSUM_FILES = "file://../license.terms;md5=7b4d3c71b2d9a8c1b373609867975570
     file://../win/license.terms;md5=7b4d3c71b2d9a8c1b373609867975570 \
     "
 
-PR = "r2"
+PR = "r3"
 
 BASE_SRC_URI = "${SOURCEFORGE_MIRROR}/tcl/tcl${PV}-src.tar.gz \
                 file://tcl-add-soname.patch"
 
 SRC_URI = "${BASE_SRC_URI} \
-	   file://fix_non_native_build_issue.patch"
+	   file://fix_non_native_build_issue.patch \
+           file://mips-tclstrtod.patch;striplevel=0"
 
 SRC_URI_virtclass-native = "${BASE_SRC_URI}"