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nspr: Add RISC-V support

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(From OE-Core rev: 47b76dd02007e96fc95099524d43d517daf2aa6e)

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
This commit is contained in:
Alistair Francis
2018-06-21 14:26:48 -07:00
committed by Richard Purdie
parent c33c20733d
commit b2a13cef91
2 changed files with 151 additions and 0 deletions
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150
meta/recipes-support/nspr/nspr/0003-Add-type-definitions-for-the-RISC-V-architecture.patch Normal file
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@@ -0,0 +1,150 @@
# HG changeset patch
# User Karsten Merker <merker@debian.org>
# Date 1523974333 -7200
# Node ID f47871e2aeb16b39d4f516690e25c81b04d6d05a
# Parent 776db96f834cb86e8863052201d55f60a2da91cb
Bug 1308584, Add type definitions for the RISC-V architecture, r=kaie
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
[ Changes by AF:
- Rebase on other Yocto patches
]
Upstream-Status: Backport [ https://hg.mozilla.org/projects/nspr/rev/f47871e2aeb1 ]
diff --git a/pr/include/md/_linux.cfg b/pr/include/md/_linux.cfg
--- a/pr/include/md/_linux.cfg
+++ b/pr/include/md/_linux.cfg
@@ -1015,16 +1015,108 @@
#define PR_ALIGN_OF_FLOAT 4
#define PR_ALIGN_OF_DOUBLE 4
#define PR_ALIGN_OF_POINTER 4
#define PR_ALIGN_OF_WORD 4
#define PR_BYTES_PER_WORD_LOG2 2
#define PR_BYTES_PER_DWORD_LOG2 3
+#elif defined(__riscv) && (__riscv_xlen == 32)
+
+#undef IS_BIG_ENDIAN
+#define IS_LITTLE_ENDIAN 1
+#undef IS_64
+
+#define PR_BYTES_PER_BYTE 1
+#define PR_BYTES_PER_SHORT 2
+#define PR_BYTES_PER_INT 4
+#define PR_BYTES_PER_INT64 8
+#define PR_BYTES_PER_LONG 4
+#define PR_BYTES_PER_FLOAT 4
+#define PR_BYTES_PER_DOUBLE 8
+#define PR_BYTES_PER_WORD 4
+#define PR_BYTES_PER_DWORD 8
+
+#define PR_BITS_PER_BYTE 8
+#define PR_BITS_PER_SHORT 16
+#define PR_BITS_PER_INT 32
+#define PR_BITS_PER_INT64 64
+#define PR_BITS_PER_LONG 32
+#define PR_BITS_PER_FLOAT 32
+#define PR_BITS_PER_DOUBLE 64
+#define PR_BITS_PER_WORD 32
+
+#define PR_BITS_PER_BYTE_LOG2 3
+#define PR_BITS_PER_SHORT_LOG2 4
+#define PR_BITS_PER_INT_LOG2 5
+#define PR_BITS_PER_INT64_LOG2 6
+#define PR_BITS_PER_LONG_LOG2 5
+#define PR_BITS_PER_FLOAT_LOG2 5
+#define PR_BITS_PER_DOUBLE_LOG2 6
+#define PR_BITS_PER_WORD_LOG2 5
+
+#define PR_ALIGN_OF_SHORT 2
+#define PR_ALIGN_OF_INT 4
+#define PR_ALIGN_OF_LONG 4
+#define PR_ALIGN_OF_INT64 8
+#define PR_ALIGN_OF_FLOAT 4
+#define PR_ALIGN_OF_DOUBLE 8
+#define PR_ALIGN_OF_POINTER 4
+#define PR_ALIGN_OF_WORD 4
+
+#define PR_BYTES_PER_WORD_LOG2 2
+#define PR_BYTES_PER_DWORD_LOG2 3
+
+#elif defined(__riscv) && (__riscv_xlen == 64)
+
+#undef IS_BIG_ENDIAN
+#define IS_LITTLE_ENDIAN 1
+#define IS_64
+
+#define PR_BYTES_PER_BYTE 1
+#define PR_BYTES_PER_SHORT 2
+#define PR_BYTES_PER_INT 4
+#define PR_BYTES_PER_INT64 8
+#define PR_BYTES_PER_LONG 8
+#define PR_BYTES_PER_FLOAT 4
+#define PR_BYTES_PER_DOUBLE 8
+#define PR_BYTES_PER_WORD 8
+#define PR_BYTES_PER_DWORD 8
+
+#define PR_BITS_PER_BYTE 8
+#define PR_BITS_PER_SHORT 16
+#define PR_BITS_PER_INT 32
+#define PR_BITS_PER_INT64 64
+#define PR_BITS_PER_LONG 64
+#define PR_BITS_PER_FLOAT 32
+#define PR_BITS_PER_DOUBLE 64
+#define PR_BITS_PER_WORD 64
+
+#define PR_BITS_PER_BYTE_LOG2 3
+#define PR_BITS_PER_SHORT_LOG2 4
+#define PR_BITS_PER_INT_LOG2 5
+#define PR_BITS_PER_INT64_LOG2 6
+#define PR_BITS_PER_LONG_LOG2 6
+#define PR_BITS_PER_FLOAT_LOG2 5
+#define PR_BITS_PER_DOUBLE_LOG2 6
+#define PR_BITS_PER_WORD_LOG2 6
+
+#define PR_ALIGN_OF_SHORT 2
+#define PR_ALIGN_OF_INT 4
+#define PR_ALIGN_OF_LONG 8
+#define PR_ALIGN_OF_INT64 8
+#define PR_ALIGN_OF_FLOAT 4
+#define PR_ALIGN_OF_DOUBLE 8
+#define PR_ALIGN_OF_POINTER 8
+#define PR_ALIGN_OF_WORD 8
+
+#define PR_BYTES_PER_WORD_LOG2 3
+#define PR_BYTES_PER_DWORD_LOG2 3
+
#else
#error "Unknown CPU architecture"
#endif
#ifndef HAVE_LONG_LONG
#define HAVE_LONG_LONG
diff --git a/pr/include/md/_linux.h b/pr/include/md/_linux.h
--- a/pr/include/md/_linux.h
+++ b/pr/include/md/_linux.h
@@ -54,16 +54,20 @@
#elif defined(__avr32__)
#define _PR_SI_ARCHITECTURE "avr32"
#elif defined(__m32r__)
#define _PR_SI_ARCHITECTURE "m32r"
#elif defined(__nios2__)
#define _PR_SI_ARCHITECTURE "nios2"
#elif defined(__or1k__)
#define _PR_SI_ARCHITECTURE "or1k"
+#elif defined(__riscv) && (__riscv_xlen == 32)
+#define _PR_SI_ARCHITECTURE "riscv32"
+#elif defined(__riscv) && (__riscv_xlen == 64)
+#define _PR_SI_ARCHITECTURE "riscv64"
#else
#error "Unknown CPU architecture"
#endif
#define PR_DLL_SUFFIX ".so"
#define _PR_VMBASE 0x30000000
#define _PR_STACK_VMBASE 0x50000000
#define _MD_DEFAULT_STACK_SIZE 65536L

1
meta/recipes-support/nspr/nspr_4.19.bb
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@@ -11,6 +11,7 @@ SRC_URI = "http://ftp.mozilla.org/pub/nspr/releases/v${PV}/src/nspr-${PV}.tar.gz
file://remove-srcdir-from-configure-in.patch \
file://0002-Add-nios2-support.patch \
file://0001-md-Fix-build-with-musl.patch \
file://0003-Add-type-definitions-for-the-RISC-V-architecture.patch \
file://nspr.pc.in \
"