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qemu: Fix CVE-2021-3750 for qemu
Add patch to fix CVE-2021-3750 (From OE-Core rev: e9e945a1d22b06d10ac07345b7cebcf232a809bb) Signed-off-by: Virendra Thakur <virendra.thakur@kpit.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
This commit is contained in:
committed by
Richard Purdie
parent
1b2fb9a1a5
commit
f30135af3a
@@ -43,6 +43,9 @@ SRC_URI = "https://download.qemu.org/${BPN}-${PV}.tar.xz \
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file://CVE-2022-0358.patch \
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file://CVE-2022-0216_1.patch \
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file://CVE-2022-0216_2.patch \
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file://CVE-2021-3750-1.patch \
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file://CVE-2021-3750-2.patch \
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file://CVE-2021-3750-3.patch \
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"
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UPSTREAM_CHECK_REGEX = "qemu-(?P<pver>\d+(\.\d+)+)\.tar"
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59
meta/recipes-devtools/qemu/qemu/CVE-2021-3750-1.patch
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59
meta/recipes-devtools/qemu/qemu/CVE-2021-3750-1.patch
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@@ -0,0 +1,59 @@
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From b9d383ab797f54ae5fa8746117770709921dc529 Mon Sep 17 00:00:00 2001
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From: =?utf8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@redhat.com>
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Date: Wed, 15 Dec 2021 19:24:19 +0100
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Subject: [PATCH] hw/intc/arm_gicv3: Check for !MEMTX_OK instead of MEMTX_ERROR
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MIME-Version: 1.0
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Content-Type: text/plain; charset=utf8
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Content-Transfer-Encoding: 8bit
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Quoting Peter Maydell:
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"These MEMTX_* aren't from the memory transaction
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API functions; they're just being used by gicd_readl() and
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friends as a way to indicate a success/failure so that the
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actual MemoryRegionOps read/write fns like gicv3_dist_read()
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can log a guest error."
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We are going to introduce more MemTxResult bits, so it is
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safer to check for !MEMTX_OK rather than MEMTX_ERROR.
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Reviewed-by: Peter Xu <peterx@redhat.com>
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Reviewed-by: David Hildenbrand <david@redhat.com>
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Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
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Signed-off-by: Philippe Mathieu-DaudÃf© <philmd@redhat.com>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Signed-off-by: Virendra Thakur <virendra.thakur@kpit.com>
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CVE: CVE-2021-3750
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Upstream-Status: Backport [https://git.qemu.org/?p=qemu.git;a=commit;h=b9d383ab797f54ae5fa8746117770709921dc529]
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---
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hw/intc/arm_gicv3_redist.c | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c
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index c8ff3ec..99b11ca 100644
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--- a/hw/intc/arm_gicv3_redist.c
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+++ b/hw/intc/arm_gicv3_redist.c
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@@ -462,7 +462,7 @@ MemTxResult gicv3_redist_read(void *opaque, hwaddr offset, uint64_t *data,
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break;
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}
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- if (r == MEMTX_ERROR) {
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+ if (r != MEMTX_OK) {
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qemu_log_mask(LOG_GUEST_ERROR,
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"%s: invalid guest read at offset " TARGET_FMT_plx
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" size %u\n", __func__, offset, size);
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@@ -521,7 +521,7 @@ MemTxResult gicv3_redist_write(void *opaque, hwaddr offset, uint64_t data,
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break;
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}
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- if (r == MEMTX_ERROR) {
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+ if (r != MEMTX_OK) {
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qemu_log_mask(LOG_GUEST_ERROR,
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"%s: invalid guest write at offset " TARGET_FMT_plx
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" size %u\n", __func__, offset, size);
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--
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1.8.3.1
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65
meta/recipes-devtools/qemu/qemu/CVE-2021-3750-2.patch
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65
meta/recipes-devtools/qemu/qemu/CVE-2021-3750-2.patch
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@@ -0,0 +1,65 @@
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From 58e74682baf4e1ad26b064d8c02e5bc99c75c5d9 Mon Sep 17 00:00:00 2001
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From: =?utf8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@redhat.com>
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Date: Wed, 15 Dec 2021 19:24:20 +0100
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Subject: [PATCH] softmmu/physmem: Simplify flatview_write and
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address_space_access_valid
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MIME-Version: 1.0
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Content-Type: text/plain; charset=utf8
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Content-Transfer-Encoding: 8bit
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Remove unuseful local 'result' variables.
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Reviewed-by: Peter Xu <peterx@redhat.com>
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Reviewed-by: David Hildenbrand <david@redhat.com>
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Reviewed-by: Alexander Bulekov <alxndr@bu.edu>
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Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
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Signed-off-by: Philippe Mathieu-DaudÃf© <philmd@redhat.com>
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Message-Id: <20211215182421.418374-3-philmd@redhat.com>
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Signed-off-by: Thomas Huth <thuth@redhat.com>
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Signed-off-by: Virendra Thakur <virendra.thakur@kpit.com>
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CVE: CVE-2021-3750
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Upstream-Status: Backport [https://git.qemu.org/?p=qemu.git;a=commit;h=58e74682baf4e1ad26b064d8c02e5bc99c75c5d9]
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---
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softmmu/physmem.c | 11 +++--------
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1 file changed, 3 insertions(+), 8 deletions(-)
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diff --git a/softmmu/physmem.c b/softmmu/physmem.c
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index 43ae70f..3d968ca 100644
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--- a/softmmu/physmem.c
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+++ b/softmmu/physmem.c
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@@ -2826,14 +2826,11 @@ static MemTxResult flatview_write(FlatVi
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hwaddr l;
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hwaddr addr1;
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MemoryRegion *mr;
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- MemTxResult result = MEMTX_OK;
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l = len;
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mr = flatview_translate(fv, addr, &addr1, &l, true, attrs);
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- result = flatview_write_continue(fv, addr, attrs, buf, len,
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- addr1, l, mr);
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-
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- return result;
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+ return flatview_write_continue(fv, addr, attrs, buf, len,
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+ addr1, l, mr);
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}
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/* Called within RCU critical section. */
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@@ -3130,12 +3127,10 @@ bool address_space_access_valid(AddressS
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MemTxAttrs attrs)
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{
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FlatView *fv;
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- bool result;
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RCU_READ_LOCK_GUARD();
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fv = address_space_to_flatview(as);
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- result = flatview_access_valid(fv, addr, len, is_write, attrs);
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- return result;
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+ return flatview_access_valid(fv, addr, len, is_write, attrs);
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}
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static hwaddr
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--
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1.8.3.1
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156
meta/recipes-devtools/qemu/qemu/CVE-2021-3750-3.patch
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156
meta/recipes-devtools/qemu/qemu/CVE-2021-3750-3.patch
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@@ -0,0 +1,156 @@
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From 3ab6fdc91b72e156da22848f0003ff4225690ced Mon Sep 17 00:00:00 2001
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From: =?utf8?q?Philippe=20Mathieu-Daud=C3=A9?= <philmd@redhat.com>
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Date: Wed, 15 Dec 2021 19:24:21 +0100
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Subject: [PATCH] softmmu/physmem: Introduce MemTxAttrs::memory field and
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MEMTX_ACCESS_ERROR
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MIME-Version: 1.0
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Content-Type: text/plain; charset=utf8
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Content-Transfer-Encoding: 8bit
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Add the 'memory' bit to the memory attributes to restrict bus
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controller accesses to memories.
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Introduce flatview_access_allowed() to check bus permission
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before running any bus transaction.
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Have read/write accessors return MEMTX_ACCESS_ERROR if an access is
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restricted.
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There is no change for the default case where 'memory' is not set.
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Signed-off-by: Philippe Mathieu-DaudÃf© <philmd@redhat.com>
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Message-Id: <20211215182421.418374-4-philmd@redhat.com>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
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[thuth: Replaced MEMTX_BUS_ERROR with MEMTX_ACCESS_ERROR, remove "inline"]
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Signed-off-by: Thomas Huth <thuth@redhat.com>
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Signed-off-by: Virendra Thakur <virendra.thakur@kpit.com>
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CVE: CVE-2021-3750
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Upstream-Status: Backport [https://git.qemu.org/?p=qemu.git;a=commit;h=3ab6fdc91b72e156da22848f0003ff4225690ced]
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---
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include/exec/memattrs.h | 9 +++++++++
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softmmu/physmem.c | 44 ++++++++++++++++++++++++++++++++++++++++++--
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2 files changed, 51 insertions(+), 2 deletions(-)
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diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h
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index 95f2d20..9fb98bc 100644
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--- a/include/exec/memattrs.h
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+++ b/include/exec/memattrs.h
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@@ -35,6 +35,14 @@ typedef struct MemTxAttrs {
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unsigned int secure:1;
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/* Memory access is usermode (unprivileged) */
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unsigned int user:1;
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+ /*
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+ * Bus interconnect and peripherals can access anything (memories,
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+ * devices) by default. By setting the 'memory' bit, bus transaction
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+ * are restricted to "normal" memories (per the AMBA documentation)
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+ * versus devices. Access to devices will be logged and rejected
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+ * (see MEMTX_ACCESS_ERROR).
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+ */
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+ unsigned int memory:1;
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/* Requester ID (for MSI for example) */
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unsigned int requester_id:16;
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/* Invert endianness for this page */
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@@ -66,6 +74,7 @@ typedef struct MemTxAttrs {
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#define MEMTX_OK 0
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#define MEMTX_ERROR (1U << 0) /* device returned an error */
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#define MEMTX_DECODE_ERROR (1U << 1) /* nothing at that address */
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+#define MEMTX_ACCESS_ERROR (1U << 2) /* access denied */
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typedef uint32_t MemTxResult;
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#endif
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diff --git a/softmmu/physmem.c b/softmmu/physmem.c
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index 3d968ca..4e1b27a 100644
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--- a/softmmu/physmem.c
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+++ b/softmmu/physmem.c
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@@ -41,6 +41,7 @@
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#include "qemu/config-file.h"
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#include "qemu/error-report.h"
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#include "qemu/qemu-print.h"
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+#include "qemu/log.h"
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#include "exec/memory.h"
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#include "exec/ioport.h"
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#include "sysemu/dma.h"
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@@ -2759,6 +2760,33 @@ static bool prepare_mmio_access(MemoryRe
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return release_lock;
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}
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+/**
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+ * flatview_access_allowed
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+ * @mr: #MemoryRegion to be accessed
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+ * @attrs: memory transaction attributes
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+ * @addr: address within that memory region
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+ * @len: the number of bytes to access
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+ *
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+ * Check if a memory transaction is allowed.
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+ *
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+ * Returns: true if transaction is allowed, false if denied.
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+ */
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+static bool flatview_access_allowed(MemoryRegion *mr, MemTxAttrs attrs,
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+ hwaddr addr, hwaddr len)
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+{
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+ if (likely(!attrs.memory)) {
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+ return true;
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+ }
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+ if (memory_region_is_ram(mr)) {
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+ return true;
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+ }
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+ qemu_log_mask(LOG_GUEST_ERROR,
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+ "Invalid access to non-RAM device at "
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+ "addr 0x%" HWADDR_PRIX ", size %" HWADDR_PRIu ", "
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+ "region '%s'\n", addr, len, memory_region_name(mr));
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+ return false;
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+}
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+
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/* Called within RCU critical section. */
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static MemTxResult flatview_write_continue(FlatView *fv, hwaddr addr,
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MemTxAttrs attrs,
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@@ -2773,7 +2801,10 @@ static MemTxResult flatview_write_contin
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const uint8_t *buf = ptr;
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for (;;) {
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- if (!memory_access_is_direct(mr, true)) {
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+ if (!flatview_access_allowed(mr, attrs, addr1, l)) {
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+ result |= MEMTX_ACCESS_ERROR;
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+ /* Keep going. */
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+ } else if (!memory_access_is_direct(mr, true)) {
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release_lock |= prepare_mmio_access(mr);
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l = memory_access_size(mr, l, addr1);
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/* XXX: could force current_cpu to NULL to avoid
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@@ -2818,6 +2849,9 @@ static MemTxResult flatview_write(FlatVi
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l = len;
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mr = flatview_translate(fv, addr, &addr1, &l, true, attrs);
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+ if (!flatview_access_allowed(mr, attrs, addr, len)) {
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+ return MEMTX_ACCESS_ERROR;
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+ }
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return flatview_write_continue(fv, addr, attrs, buf, len,
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addr1, l, mr);
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}
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@@ -2836,7 +2870,10 @@ MemTxResult flatview_read_continue(FlatV
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fuzz_dma_read_cb(addr, len, mr);
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for (;;) {
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- if (!memory_access_is_direct(mr, false)) {
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+ if (!flatview_access_allowed(mr, attrs, addr1, l)) {
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+ result |= MEMTX_ACCESS_ERROR;
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+ /* Keep going. */
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+ } else if (!memory_access_is_direct(mr, false)) {
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/* I/O case */
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release_lock |= prepare_mmio_access(mr);
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l = memory_access_size(mr, l, addr1);
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@@ -2879,6 +2916,9 @@ static MemTxResult flatview_read(FlatVie
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l = len;
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mr = flatview_translate(fv, addr, &addr1, &l, false, attrs);
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+ if (!flatview_access_allowed(mr, attrs, addr, len)) {
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+ return MEMTX_ACCESS_ERROR;
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+ }
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return flatview_read_continue(fv, addr, attrs, buf, len,
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addr1, l, mr);
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}
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--
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1.8.3.1
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