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Integrating Paul Gortmaker's v4.12.25 -stable queue, which comprises the following commits: e61748ef5db0 Linux 4.12.25 c34553e3e8af x86/bugs: Rename SSBD_NO to SSB_NO 4aa9e65a91b9 x86/bugs: Remove x86_spec_ctrl_set() 7283d22a40c4 x86/bugs: Expose x86_spec_ctrl_base directly 60fb8f1bbd46 x86/speculation: Rework speculative_store_bypass_update() cc8a65725832 x86/cpufeatures: Disentangle SSBD enumeration 4cadf648f802 x86/cpufeatures: Disentangle MSR_SPEC_CTRL enumeration from IBRS 14476a34b4d0 x86/speculation: Use synthetic bits for IBRS/IBPB/STIBP e66dd0595eac x86/cpu: Make alternative_msr_write work for 32-bit code 32e38eda9958 x86/bugs: Fix the parameters alignment and missing void 5593194735ea x86/bugs: Make cpu_show_common() static 86e7eb199990 x86/bugs: Fix __ssb_select_mitigation() return type 4efd9170a722 Documentation/spec_ctrl: Do some minor cleanups e074092d9d0a proc: Use underscores for SSBD in 'status' f57b4be9a391 x86/bugs: Rename _RDS to _SSBD f395cafed558 x86/speculation: Make "seccomp" the default mode for Speculative Store Bypass 9599751872de seccomp: Move speculation migitation control to arch code 647fb2d84f05 seccomp: Add filter flag to opt-out of SSB mitigation 44d5a1d9fe07 seccomp: Use PR_SPEC_FORCE_DISABLE 9490e71c3074 prctl: Add force disable speculation ad5b97fe1ab6 x86/bugs: Make boot modes __ro_after_init cfc00a7877b6 seccomp: Enable speculation flaw mitigations bc4bf81c64b0 proc: Provide details on speculation flaw mitigations a41d2136a447 nospec: Allow getting/setting on non-current task 7e17279e72b9 x86/speculation: Add prctl for Speculative Store Bypass mitigation eea6b1abc91e x86/process: Allow runtime control of Speculative Store Bypass c8630c28cd28 prctl: Add speculation control prctls ecefae5ca101 x86/speculation: Create spec-ctrl.h to avoid include hell 4bcdf54612aa x86/bugs/AMD: Add support to disable RDS on Fam[15,16,17]h if requested 6ce1317929a3 x86/bugs: Whitelist allowed SPEC_CTRL MSR values cd5e5e6f2e39 x86/bugs/intel: Set proper CPU features and setup RDS d97584229d85 x86/bugs: Provide boot parameters for the spec_store_bypass_disable mitigation 793b7453cfc5 x86/cpufeatures: Add X86_FEATURE_RDS c6c3cd47ccbb x86/bugs: Expose /sys/../spec_store_bypass 2d92a521bda7 x86/bugs: Read SPEC_CTRL MSR during boot and re-use reserved bits 81865e325abe x86/bugs: Concentrate bug reporting into a separate function 45245a5b9dc4 x86/bugs: Concentrate bug detection into a separate function 05e82d536970 x86/nospec: Simplify alternative_msr_write() effb0dfecfa2 x86/cpu_entry_area: Sync cpu_entry_area to initial_page_table 89fffee9d555 x86/xen: Zero MSR_IA32_SPEC_CTRL before suspend 76199d7beb0b x86/speculation: Move firmware_restrict_branch_speculation_*() from C to CPP 426210b00b02 x86/speculation: Use IBRS if available before calling into firmware 63904f8a6d41 x86/entry/64: Fix CR3 restore in paranoid_exit() 35cf6a9daf5f x86/cpu: Change type of x86_cache_size variable to unsigned int 7fded60b2cb7 x86/spectre: Fix an error message 343945a16727 x86/speculation: Add <asm/msr-index.h> dependency eb0f059ee2de nospec: Move array_index_nospec() parameter checking into separate macro 31951a39de73 x86/speculation: Fix up array_index_nospec_mask() asm constraint 344711f16fec x86/entry/64: Remove the unused 'icebp' macro d4324affaf05 x86/entry/64: Fix paranoid_entry() frame pointer warning 3cadbc9228b4 x86/entry/64: Indent PUSH_AND_CLEAR_REGS and POP_REGS properly 0d561147160c x86/entry/64: Get rid of the ALLOC_PT_GPREGS_ON_STACK and SAVE_AND_CLEAR_REGS macros 22c1269eefa9 x86/entry/64: Use PUSH_AND_CLEAN_REGS in more cases ac897d25b1d3 x86/entry/64: Introduce the PUSH_AND_CLEAN_REGS macro 226eea037fa6 x86/entry/64: Interleave XOR register clearing with PUSH instructions 120d889cac9f x86/entry/64: Merge the POP_C_REGS and POP_EXTRA_REGS macros into a single POP_REGS macro 2d5eb3888f24 x86/entry/64: Merge SAVE_C_REGS and SAVE_EXTRA_REGS, remove unused extensions 797a6f4444f1 x86/speculation: Clean up various Spectre related details ff032faca431 KVM/nVMX: Set the CPU_BASED_USE_MSR_BITMAPS if we have a valid L02 MSR bitmap 1aaab2d1a1fd KVM/x86: Reduce retpoline performance impact in slot_handle_level_range(), by always inlining iterator helper methods dd17c0f5a114 Revert "x86/speculation: Simplify indirect_branch_prediction_barrier()" add7dd4f1f81 x86/speculation: Correct Speculation Control microcode blacklist again 358f03a9395f x86/speculation: Update Speculation Control microcode blacklist 0307861327c7 x86/mm/pti: Fix PTI comment in entry_SYSCALL_64() a612b987b028 x86/entry/64/compat: Clear registers for compat syscalls, to reduce speculation attack surface 1b8b432f6dee x86/entry/64: Clear registers for exceptions/interrupts, to reduce speculation attack surface 513e4bbfc32c x86/entry/64: Clear extra registers beyond syscall arguments, to reduce speculation attack surface (From OE-Core rev: 400c1bd54c0191b96bccfe0d2755995bdfc04fc1) (From OE-Core rev: 50bf492ce1db930b5a1c3f0d750015c04a6aaaf0) Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org> Signed-off-by: Armin Kuster <akuster808@gmail.com> Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
QEMU Emulation Targets ====================== To simplify development, the build system supports building images to work with the QEMU emulator in system emulation mode. Several architectures are currently supported in 32 and 64 bit variants: * ARM (qemuarm + qemuarm64) * x86 (qemux86 + qemux86-64) * PowerPC (qemuppc only) * MIPS (qemumips + qemumips64) Use of the QEMU images is covered in the Yocto Project Reference Manual. The appropriate MACHINE variable value corresponding to the target is given in brackets.